Integration Aspects of DC-DC Converters - PowerPoint Presentation

Slide1

Integration Aspects

of DC-DC Converters

TUPO, June 10

th

, 2009

Katja Klein

1. Physikalisches Institut B

RWTH Aachen University

Slide2

Outline

Katja Klein 2

Conversion ratio & output currentDimensions and weight of buck convertersMaterial budgetCooling requirementsShielding requirements

Should the DC-DC converter be part of the module?Possibility of integration for various module proposalsProvision of two operation voltages for CBCDiscussion of four optionsConclusion & recommendation

Assumption: GBT powered from outside of sensitive volume

Slide3

Comparison of Layouts

3

Layout

FE-PowerLink-PowerTotal Power# of Modules

FE-Power per moduleLong barrel double stack (Marcello)100kW

25kW $125kW20 0004 - 9W

Hybrid layout § (Duccio)tracking12.5kW2.9kW &

43kW10 0400.94 -

1.9Wtrigger12kW15.6kW &1 568 *1.3 – 9W #

Cluster width

Fabrizio;barrel only

20.9kW2.3 – 14.1kW °

23.2 – 35.0kW14 037

1.25W

Duccio;full outer tr. 56.5kW

~

20kW

~

75kW

13 008

1.1 – 9.4W

All power numbers include a DC-DC efficiency of 80%

§ Variant with 2 long barrel p

T

layers and tracking-only endcaps$ assuming 10Gb/s GBT-like link, 2W per link& with 2W/GBT° depends on optical module (GBT vs. MZM), larger number for GBT (3W per GBT)* for A = 85cm2# depends strongly on module proposal

Katja Klein

Slide4

Total Power Consumption

4

Total power consumption limited by heating up of water-cooled cable channels

Today the total current in cable channels is 15kA Upper limit would have to be determined by measurements on mock-ups of

hot spots in cable channel (Hans Postema) 10-20% more might be possible, but probably not more? (Hans Postema) Can calculate maximum power consumption for certain

convertion ratio r = Iin / I

out: E.g. for r = 1/10 and 80% efficiency: Pmax = 150kA x 1.2V x 0.8 = 144kW

Can estimate the necessary conversion ratio for a given power consumption: r = 15kA / Iout

P = Uout x Iout (includes already converter efficiency of 80%) r = 15kA x Uout

/P

LayoutTotal PowerOperating voltageConversion Ratio

Long barrel double stack125kW0.9V

1/10Hybrid strawman43kW

1.2V0.4

Katja Klein

Slide5

Conversion Ratio from Cable Specs

5

Assume only 1 000 LICs can be used to power the modules (reason: links)

Spec of LICs: Umax = 30V, I

max = 20A (return) Calculate mean number of modules per LIC

Calculate mean current per LIC Estimate necessary conversion ratio

In reality, could try to level out (but then granularity becomes an issue)Katja Klein

Layout# of Modules

Power per module# Modules per LICCurrent per LIC(worst case)Conv. ratioLong barrel double stack20 0004 - 9W20200A

1/10Hybrid strawmantracking

10 0400.9 - 1.9W

1219A

1trigger

1 568up to 9W

12120A

1/6

Slide6

First Conclusion

6

Buck converters are needed at least for trigger layers Charge pumps are no option for some approaches (max. current ~ 1A)

Currents to be provided too big for a single charge pump per module Charge pump per chip not feasible (90nm, no space for capacitors, ...)

Discuss in the following the integration of buck converters Come back to charge pumps later

Katja Klein

Slide7

Dimensions and Weight of Buck PCBs

Katja Klein

7

Aachen PCB with

lowest noise (V3):Area: 2.3cm

2Height: 10mmWeight: 1.0g

Smallest Aachen PCB (V1):Area: 3.2cm2

Height: 10mmWeight: 1.1g

27mm

12mm

12mm

19mm

Numbers are without connectors

Slide8

Dimensions and Weight of Buck PCBs

Katja Klein

8

SMD

SMD

SMD

SMD

INDUCTOR

ASIC

1.5-2 cm

1.5-2 cm

CERN PCB

(proposal):

Area (currently) needed per buck converter PCB: 2-4cm

2

Some further minimization probably possible (e.g. remove connectors)

But filter capacitors are necessary

Coil must have a certain inductance (



noise) and low DC resistance (



efficiency)

Slide9

Material Budget

Katja Klein

9

TEC, conversion ratio 1/8, eff. = 80%, current power consumption, 1.2V only (Aachen)

One buck converter per module, located close to module

TEC electronics & cables: - 29%

Original TEC

TEC with

buck convertersr = 1/8

Total MB of: TEC modules

TEC Converters

 With above assumptions, buck converter close to module saves material

(caveat: savings are half due to DC-DC conversion, half due to methodology)

Slide10

Material Budget

Katja Klein

10

TEC electronics & cables: - 18%

Buck converter close to module gives largest saving for TEC

Desirable to repeat study for barrel geometry and two operation voltages

TEC electronics & cables: - 24%

Buck converters with r = 1/8,

located at petal rim:Buck converters with r = ¼ at petal rim,one charge pump with r = ½ per chip

Slide11

Cooling Requirements

Katja Klein

11

Converter efficiency ~ 80% Heat to be dissipated ranges from 150mW (outer tracker module with 1 hybrid)

to ~ 2W (3D-integrated stacked module, inner layers) A contact to the cooling system should be foreseen

Slide12

Shielding Requirements

Katja Klein

12

Measurements show that shielding the whole converter helps against EMI from coil Shielding only the coil

was not so efficient (reason not completely understood) New Aachen boards need not

be shielded anymore in our system test set-up Requirements depend strongly on distance to FE-electronics (plus technical details of converter and coil...)

Recommendation at this point: a DC-DC converter on the module should be shielded

30m of Aluminium worked fine (no improvement with thicker shields) Details would have to be worked out and tested

Measurements with solenoid coil(worst case)

Slide13

Integration of Buck Converter (I)

13

Arguments for buck converter on separate PCB, close to module: Very limited space on most proposed hybrids

 size less critical Larger distance preferred for EMI anyway (also damping of ripple?)

Converter development completely decoupled from hybrid and module development No common deadlines, can optimize converter design as needed (even late)

Different hybrids for different module proposals 

avoid involvement of many groups PCB could be developed, manifactured and tested standalone Easier for cooling? (module cooling is difficult enough without converters)

Arguments for buck converter on the module/hybrid: Less mass (avoid connectors & connection between converter and module)

Power regulation closer to FE-ASICs (only relevant if no LDO) Could have pluggable PCB on hybrid, but then connectors are needed (mass) Noise effects can be tested more easily (don‘t need additional PCB)Katja Klein

Slide14

Outer Tracker Module Proposal

CBC-power ~ 0.75W per hybrid;

i.e. 0.75W or 1.5W per module Plus DCU, PLL, DC-DC inefficiency,

GBT-port, MUX, LCDS-driver No motherboards

Upper part of hybrid ~ 2.5cm x 1cm, no space for buck on this hybrid

Some space between hybrids; but routing of input & output?

Integration of buck on rod level looks more practical and elegant

DC-DC out 2.5V

Sensor HV

DCU

Sensor with 4x2.5cm strips

2x 1024 @95um pitch

integrated pitch adaptor

2 x 4-MUX + LCDS driver

each output 160Mbit/s

PLL

TCS I/O

shielded micro-twisted pairs

I

/O

DC-DC

2.5cm

Katja Klein

14

8x CBC 2x 128ch

wire bonded

40Mbit/s out each

Slide15

Outer Tracker Module Proposal

Indeed the buck converter must be able to provide several Amps

(as anyway needed by pT-modules) Could save material by combining two one-hybrid modules into one unit

Could even consider to power two two-hybrid modules (3W) with one converter

Loose two modules if converter fails No other drawbacks from power point of view

Katja Klein

15

Slide16

Vertically Integrated Hybrid Module

130 or 90nm

Communication through vias in

ROC and interposer (3D-integration)

No motherboards

FE-power 4-9W per stacked module Up to 10A per stacked module

Need at least two buck converters per stack (better more)  module needs to be “partitioned“

No space on module; no hybrid

Modules integrated onto “beams“ Buck converters must be integrated into beam structure Shielded space already foreseen Discussions between Fermilab & Aachen started

16

Katja Klein

Slide17

Trigger Module (Sandro)

1 Modul:

90nm

Sensor size = 4.8cm x 4.8cm

Hybrid ~ 1cm x 4.8cm Power per p

T-module = 2.6W I per modul ~ 3A

No space for buck converter (unless hybrid is considerably increased) Practical issues (fabrication?) Again, integration into support

structure seems more feasible How would support structure look like?

1 Chip

17

Katja Klein

Slide18

Trigger Module (Geoff et al.)

80mm

data out

control in

26mm

Sensor size ~ 2.6cm x 8.0cm

Hybrid ~ 1cm x 4cm

130nm

Power per p

T

-module ~ 1.3W (similar to outer tracker module)

No space for buck converters, unless hybrid is considerably increased

18

Katja Klein

Slide19

Integration of Buck Converter (II)

19

There is a tendency to avoid motherboards at all Outer tracker module, vertically integrated double-stack proposal, others?

This goes hand in hand with rather minimalistic hybrids of a few cm2

All existing or planned buck converter PCBs need an area of 2 - 4cm2

Suggestion: a separate buck converter PCB close to the module,

e.g. inside the beam (for double-stack approach) or on the rod/stave converter needs cooling contact – probably not too dificult then need short power cable between converter PCB and module

Could/should be designed such that it fits with all proposals/applications: Version with 1.2V and 0.9V for CBC

Version with two (or three) buck converters for very high-power trigger modules Version with 1.2V and 2.5V for GBT, for PP1 or bulkheadKatja Klein

Slide20

Provision of two Operating Voltages for CBC

20

Vana

= 1.2V, possibility to have Vdig < Vana

(~ 0.9V) P = 64mW per Chip with 1.2V (26mW analog power, digital power would be halved with U = 0.9V)

Both analog and digital currents ~ 20-30mA per chip How to provide the two voltages? Options:

Use the two LV conductors in LICs and two separate buck convertersSame conversion ratio for both bucksPower supplies must provide two voltages

Provide one common input voltage, use two separate buck convertersDifferent conversion ratios for bucks

Lower power losses than option 1. Derive Vdig from Vana with linear regulator Method with lowest efficiency

Derive Vdig from V

ana with charge pump (ratio 4:3)

Option with lowest mass and space requirementsBrings us to more general question: do we want to use charge pumps, and how?

Katja Klein

Slide21

Option 1: Only Buck Converters

21

Conversion in one step

Assume buck converter close to the modules with r = 1/6 or smaller (as needed) If the necessary conversion ratio can be realized in one step for all proposals

must be studied with new ASIC prototypes! (issue of switching losses) Do not use charge pumps 

no additional chips on the FE-hybrid or inside CBC Must find space for 1 or 2 buck converters (as many as operating voltages)

either on your module/hybrid or (preferred!) on your support structure If decided to put buck on support structure, module design can proceed completely independently

Could fit with all proposals Maximal current per buck converter to be understood, of the order of 4A

Looks tight for double-stack proposal, must find reasonable partitioningKatja Klein

Slide22

Option 2: Buck + Charge Pump per Module

22

Could be necessary if conversion ratio cannot be provided in one step

Buck converter with r  ¼ close to module; charge pump with r = ½ per module

Is however NOT compatible with any pT-module (due to current requirements) (Only) Possible useful application: provision of Udig

for CBC for one FE-hybrid conversion ratio 4:3, current ~ 300mA

less material than two buck converters (but not half!) on cost of higher complexity Space for buck converter: see option 1

In addition need space for 1 chip plus capacitors (details to be worked out)

on FE-hybrid or even on buck PCB? Such a chip is currently not being developedKatja Klein

Slide23

Option 3: Buck + Charge Pump On-Chip

23Katja Klein

Assume charge pump is integrated

into read-out ASIC

Concerns raised by Mark: substrate noise, constraints on layout, space for passives

Could be necessary if conversion ratio cannot be provided in one step Buck converter with r

 ¼ close to module; charge pump with r = ½ per module Seems NOT compatible with some pT-modules (technology, space for passives) Possible useful application: provision of U

dig for CBC conversion ratio 4:3, current ~ 20mA

less material than two buck converters (but not half!) Alternative: derive both voltages with charge pumps conversion ratio 1:2  one capacitor per voltage (100nF, 0201?) need LDO for analogue power

can switch on/off single read-out ASICs how to power auxiliary ASICs (PLL, MUX, LCDS driver, ...)?

Space for buck converter: see option 1

In addition need space for capacitor(s) close to CBC on FE-hybrid

Design block for 60mA in 130nm being developed by CERN/Atlas

Slide24

Option 4: Buck + Sep. Charge Pump per Chip

24

Katja Klein

Assume now separate charge pump chip per readout-ASIC

No substrate noise, no constraints on CBC layout Space for passives still needed, plus

space for charge pump chips Very small chips to be integrated onto hybrid – possible but cumbersome?

Looks NOT compatible with some pT-modules (technology, space) Possible useful application: provision of Udig for CBC

conversion ratio 4:3, current ~ 20mA less material than two buck converters, but more than option 3

Alternative: derive both voltages with charge pumps conversion ratio 1:2  one capacitor per voltage (100nF, 0201?) need LDO for analogue power can switch on/off single read-out ASICs

Space for buck converter: see option 1

In addition need space for 1 or 2 chips plus capacitor(s) close to CBC

Slide25

Conclusion & Recommendation (my opinion)

25

Katja Klein

Buck converters cannot be avoided (but charge pumps can)

No motherboards and no or very small hybrids  integrate buck converter onto separate small PCB

Cannot decide today if charge pumps are needed, keep option open

Abandon option 4 (separate charge pump chip per read-out ASIC) Prepare for option 1 with buck on support structure Explore and do not exclude options 2 & 3 Allow some space for charge pump chip plus caps on hybrid

Allow some space for caps close to CBC Integrate charge pump block offered by CERN group into CBC

in a way that it can be bypassed would learn a lot about option 3 this is an opportunity to make real progress!