Comb Filter ADC Mezzanine ADC ADC VFC board FMC FPGA HTGFMC14ADC 14 bits 96 ENOBS 26 Gsps VFCHD 3 Gsps VFCHS Configuration with VFCHD tested with beam on the stripline ID: 1030885
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1. Digital Acquisition ChainComb FilterADC MezzanineADCADCVFC boardFMCFPGAHTG-FMC-14ADC: 14 bits (9.6 ENOBS) @ 2.6 Gsps (VFC-HD)@ 3 Gsps (VFC-HS) Configuration with VFC-HD tested with beam on the stripline BPMSY4L5 in LHC P5, USC55.Digital acquisition chain schematic architectureBunch acquisition example (beam data)
2. System ResolutionSimulations and MeasurementsResolution for bunch by bunch, turn by turn measurements. For Intensity > 1e10Resolution:Singlet < 200 μm(beam data)Doublet < 400 μm (only simulation)