Request Reply Master CRU FPGA Slave SCA Master sends request and commands to the slave and the slave responds with reply and data from the onboard interfaces such as I2C SPI The communication is based on ID: 787231
Download The PPT/PDF document "RX TX E LINK @ 80 Mbps" is the property of its rightful owner. Permission is granted to download and print the materials on this web site for personal, non-commercial use only, and to display it on your personal computer provided you do not modify the materials and that you retain all copyright notices contained in the materials. By downloading content from our website, you accept the terms of this agreement.
Slide1
RX
TX
E LINK @ 80 Mbps
Request
Reply
Master (CRU FPGA)
Slave (SCA)
Master sends request and commands to the slave and the slave responds with reply and data from the on-board interfaces such as I2C, SPI
The communication is based on
Elink which works on the HDLC protocol + the channel command protocol (to address the on chip interfaces on the FE side)
SCA Communication Understanding
Slide2SCA Communication Understanding
RX
TX
2 bit HDLC data @ 40 MHz
MasterSlave
Minimum 64 bits required for one HDLC frame as per figure 5 of GBT-SCA user manual
So, Data for 32 clocks needs to be stored and concatenated to form one HDLC frame and then the payload field needs to be unwrapped to derive:-
Tr.ID
Channel
Length
Command
Data
Slide3HDLC Frame
SOF
Address
Control
Payload
FCS
EOF
SOF - 6 consecutive 1’s 01111110 (8 bits)
Address – 0x00
Control - 8 bits for uniquely numbering 8 consecutive packets Note: Master waits for ACK. from slave before sending new packets SREJ is flagged by the receiver for missing packets Other function of the control field is for the supervisory commands i.e. Connect, Reset, TestPayload – 16xN user defined bits
FCS - 16 bit CRC defined
as 𝐺(𝑥) =
𝑥
16
+
𝑥
12
+
𝑥
5
+ 1EOF – Same as SOF i.e. 6 consecutive 1’s 01111110 (8 bits)
Slide4TX to RX CommunicationTransaction ID – 8 bits =
0x1 to 0xfe for normal operationChannel field – 8 bits - The channel for which the transmit message from the master is intended for (ref page 12-13 of GBT SCA manual)Length – 8 bits - Specifies number of byte in the data fieldCommand – 8 bits – specifying the operation to be performed by the slaveData - 0/16/32 bits For RX to TX Communication
The Command field is replaced by the Error Field which is of 8 bits. Default when no error occurs is 0x00
Tr.ID
Channel
Length
Command
Data
Slide5CRU to SCA communicationGBTX ASIC is transparent to this communication4 bits of GBTX are reserved for Slow Control
2 bits for Internal Control or IC and 2 bits for External Control or ECWe use 2 EC bits and use a SIPO on the SCA side to read in the HDLC information transmitted by the CRU Doubt: in figure 5 of the GBT SCA user manual the payload of HDLC is shown as 16xN bits but the TR ID, Channel, Length, Command/Error together form 32 bits so the minimum value of N must be 2. Is the understanding correct?
The EC field is to be extracted from the GBTX packet from the FRMUP (for TX) and FRMDWN (RX) bits
The clock used is 40 MHz differential, and the minimum bandwidth of the Elink interface is 80 Mbps
SOF
Address
Control
Payload
FCS
EOF
16N
Slide6Avalon Bus IPs For ease of communication with the CRU firmware design
HDLC Receiver
HDLC Transmitter
Controller
Avalon
Avalon
Test Packet/Payload
Checker
Test Packet/Payload Generator