ARCHITECTURE ADCSS Wednesday November 12th 2019 Pierre SPIZZI CNES AGENDA ADCSS Wednesday November 12th 2019 2 DARWIN HISTORY AND GOALS AVIONIC AND ELECTRICAL ARCHITECTURE HY ID: 852716
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1 CENTRALIZED AND MODULAR ARCHITECTURE AD
CENTRALIZED AND MODULAR ARCHITECTURE ADCSS - Wednesday, November 12th, 2019 Pierre SPIZZI, CNES AGENDA ADCSS - Wednesday , November 12th, 2019 2 ï DARWIN HISTORY AND GOALS ï AVIONIC AND ELECTRICAL ARCHITECTURE ï HYPERION ï BOMO ï DARWIN DEMONSTRATION ï CONCLUSION AGENDA 3 ï
2 DARWIN HISTORY AND GOALS ï AVIONIC
DARWIN HISTORY AND GOALS ï AVIONIC AND ELECTRICAL ARCHITECTURE ï HYPERION ï BOMO ï DARWIN DEMONSTRATION ï CONCLUSION ADCSS - Wednesday , November 12th, 2019 ADCSS - Wednesday, November 12th, 2019 DARWIN DEFINITION DARWIN is a CNES internal demonstrator ï âLow - costâ
3 products ï COTS components ï âNe
products ï COTS components ï âNew - spaceâ ï Modularity It addresses 2 different goals: ï Avionics functions integration in the OBC (uses of SoC) ï Modular and distributed electrical architecture 4 ADCSS - Wednesday, November 12th, 2019 DARWIN ON THE ORIGIN OF SPECIES
4 The project stemmed from 3 observations:
The project stemmed from 3 observations: ï A lot of R&D projects carried out separately in many fields of avionics but never brought together ï New SOCs now available are much more capable than traditional space hardware ï Cost (+ Mass & Power & Volume) are increasingly impor
5 tant in space industry 5 ADCSS - Wedne
tant in space industry 5 ADCSS - Wednesday, November 12th, 2019 DARWIN - R&D BUILDING BLOCKS 6 Central Intelligence Dedicated functions Software developments Hardware developments Ninano SBC ASCOTT GNSS Modular PCU CAN bus Hypervisor Development Hyperion OBC Low - Cost RF MEMS Gyros P
6 US on ARM NINA Board ASCOTT GNSS GNSS
US on ARM NINA Board ASCOTT GNSS GNSS on Ninano Modular PCU Auriga Stand - Alone SST Low - Cost RF GNSS on Ninano Auriga Stand - Alone SST ADCSS - Wednesday, November 12th, 2019 EVOLUTION OF SPACE PROCESSORS 7 Zynq7xxx GR712 ~150MIPS AT697 ~100MIPS SCOC3 ~60MIPS ERC32 ~10MIPS LENA
7 ~4MIPS T805 ~2MIPS MA31750 ~2MIPS Demete
~4MIPS T805 ~2MIPS MA31750 ~2MIPS Demeter OBC Jason1 DHU Proba1 OBC Proba2 OBC AS250 HYDRA AS250 OSCAR 2010 1989 2019 CPU Hyperion 150 Mips 1000 Mips ADCSS - Wednesday, November 12th, 2019 DARWIN - AROUND OBC CENTRALIZATION 8 HYPERION Mémoire de masse Target : Kg 20W - 45W, Typ 22W 236
8 *181*122mm ( redundant version) Star tr
*181*122mm ( redundant version) Star tracker - processing 400g 3 W 150*170mm TMTC 1Kg 3 W 120*160*40mm OBC 3Kg 7W 220*120*143mm GNSS 3Kg 15 - 20W 176*170*116mm ADCSS - Wednesday, November 12th, 2019 DARWIN - MODULAR AND DISTRIBUTED ELECTRICAL ARCHITECTURE PCDU are usually massive units
9 : ï accommodation inside platforms is
: ï accommodation inside platforms is difficult ï specific hardware required for thermal management (heat pipe, heat spreaderâ¦) ï High concentration of connectors ï harness routing on connectors faces is difficult ï low modularity ï significant recurring prices ï A
10 solution is to implement a modular an
solution is to implement a modular and distributed architecture 9 Sentinel 3 Sentinel 2 - A Thales Alenia Space Myriade PCDU AGENDA 10 ï DARWIN HISTORY AND GOALS ï AVIONIC AND ELECTRICAL ARCHITECTURE ï HYPERION ï BOMO ï DARWIN DEMONSTRATION ï CONCLUSION ADCSS - Wednesday ,
11 November 12th, 2019 ADCSS - Wednesda
November 12th, 2019 ADCSS - Wednesday, November 12th, 2019 AVIONIC AND ELECTRICAL ARCHITECTURE 11 AGENDA 12 ï DARWIN HISTORY AND GOALS ï AVIONIC AND ELECTRICAL ARCHITECTURE ï HYPERION ï BOMO ï DARWIN DEMONSTRATION ï CONCLUSION ADCSS - Wednesday , November 12th, 2019 ADCSS
12 - Wednesday, November 12th, 2019 HYPER
- Wednesday, November 12th, 2019 HYPERION ï COTS based architecture ï Automotive grade components ï Latchup free or localy protected ï Cumulated dose up to 5kRads (goal up to 10kRads) 13 ï Developped by STEEL ELECTRONIQUE Company ADCSS - Wednesday, November 12th, 2019 HYPE
13 RION CV: ï [ 22 , 42 ]V Primary power![RION
CV:
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power](852716/rion-cv-22-42-v-primary-power-pmaxr-el-3.jpg "RION
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RION CV: ï [ 22 , 42 ]V Primary power ï PmaxRéel = 35 W et Ptyp = 20 W ï Electrical architecture of converter in cold redundancy ï Autonomous switching as last « watchdog level » CPU/COMUX: ï Zynq based architecture in cold redundancy ï ATMEGA based supervisor unit ï Shared Co
14 ntext memory between redundancies ï Ma
ntext memory between redundancies ï Many communications interfaces available RF BOARD (Option under advisement ): ï GNSS and TMTC handling ( developped by SYRLINKS Company ) 14 ADCSS - Wednesday, November 12th, 2019 HYPERION 15 CPU A ou B: 1 x 1553 A/B 1 x TMTC RS422 N/R 1 x IF TEST
15 (Vidéo, Ethernet) 7 x SPARE RS422 Full
(Vidéo, Ethernet) 7 x SPARE RS422 Full - D 1 x TMI - X (LVDS) 2 x GTX Lane 1 x Trace 1 x JTAG COMUX : 6 x SpW 3 x Bus CAN CPU 2 x Bus CAN SRU 15 x ANALOG IN 8 x UART RS422 Full - D 3 x PPS RS422 8 x BLD IN 8 x BLD OUT CV A ou B: 1 x BNR 28 V 5 x sorties 5V (7.5 W) 2 x sorties 5V ou 15V (
16 7.5 W) RF: 2 x S - Band 2 x GNSS ADCSS
7.5 W) RF: 2 x S - Band 2 x GNSS ADCSS - Wednesday, November 12th, 2019 HYPERION Advantages: ï Functions centralization ï Reduction of accommodation constrains and harness routing ï Reduction of mass ï Low cost solutions for new space projects (goal / 2 with OBC Myriade ) ï Redu
17 ndancy strategy handled ï Big number o
ndancy strategy handled ï Big number of interfaces Drawbacks: ï Reliability as a best effort Actual status : EM under test / EQM at end of 2020 16 AGENDA 17 ï DARWIN HISTORY AND GOALS ï AVIONIC AND ELECTRICAL ARCHITECTURE ï HYPERION ï BOMO ï DARWIN DEMONSTRATION ï CONCLUSIO
18 N ADCSS - Wednesday , November 12th,
N ADCSS - Wednesday , November 12th, 2019 ADCSS - Wednesday, November 12th, 2019 18 Myriade Platform - CNES How to use Modules? Example of Myriade Platform Before After POWER COND DISTRI HEATER CONTROL and ACQ BOMO REPRESENTATION PYRO / SEP PASSIVATION ADCSS - Wednesday, November 12
19 th, 2019 BOMO GENERAL: ï COTS based ar
th, 2019 BOMO GENERAL: ï COTS based architecture ï Standard mechanic ï No failure propagation to other terminals CORE: ï Primary power between 22 V and 38 V ï PIC 18 LF 4685 Core processor ï CAN BUS interface ï FUSE protected SPECIFIC: ï Handling separated functions of forme
20 r PCDU 19 ï Developped by EREMS Comp
r PCDU 19 ï Developped by EREMS Company ADCSS - Wednesday, November 12th, 2019 BOMO 3 under developpement ï BoMo - C : Solar array DET Conditioning boxes (handling 7 DET of 2 , 5 A each ) ï BoMo - D : Power distribution boxes to deliver primary power to secondary through current li
21 miter circuitry (goal : 10 lines ) ï B
miter circuitry (goal : 10 lines ) ï BoMo - PSP : Handling 4 pyrotechnic device (SA), as well as separation module from launcher and passivation system at S/C end of life Others to be developed ï BoMo - IO : Acquisition and drive of up to 12 I/O (TBC) ï BoMo - T : Thermal control boxe
22 s allowing the drive of 4 heaters and th
s allowing the drive of 4 heaters and the acquisition of up to 8 thermistors (TBC) ï BoMo - A : Power conversion boxes allowing to deliver secondary regulated voltages (+/ - 15 V, +/ - 12 V, 5 V) (TBC) ï BoMo - P : Pyrotechnic boxes handling up to 10 pyrotechnic system (TBC) ï BoMo -
23 M : MTQ or Motor drive boxes handling up
M : MTQ or Motor drive boxes handling up to 3 inductive subsystem (MTQ or Motor phases) 20 ADCSS - Wednesday, November 12th, 2019 BOMO Quality : ï Automotive grade Radiations & Effects : ï Latchup free or localy protected ï Cumulated dose up to 10 kRads Planning : ï 3 first BOMO (C
24 , D, PSP) expected at end of 2019 21 ADC
, D, PSP) expected at end of 2019 21 ADCSS - Wednesday, November 12th, 2019 BOMO Advantages: ï Flexibility of platforms designs ï Reduction of accommodation constrains and harness routing ï Reduction of mass ï Low cost solutions for new space projects (goal / 2 with PCDU Myriade )
25 ï Modules could be used in simplex cha
ï Modules could be used in simplex chain or in redundant architecture pending SPF analysis . Drawbacks: ï Need of redundancy management at spacecraft level if SPF are forbidden in the project 22 AGENDA 23 ï DARWIN HISTORY AND GOALS ï AVIONIC AND ELECTRICAL ARCHITECTURE ï HYPERION
26 ï BOMO ï DARWIN DEMONSTRATION ï CO
ï BOMO ï DARWIN DEMONSTRATION ï CONCLUSION ADCSS - Wednesday , November 12th, 2019 ADCSS - Wednesday, November 12th, 2019 DARWIN DEMONSTRATION ï AOCS closed loop ï Wheels , MTB, SST ï Myriade based model MNO ï Representative Flight SW ï Representative Flight HW Result
27 s : ï Comparison of performances betw
s : ï Comparison of performances between classical OBC and DARWIN OBC ï Processor performances and ressources ï PL ressources ï Consumption and thermal dissipation ï Development Model with SmallSat OBC « Ninano » from STEEL ELECTRONIQUE Company ï Smaller Chip ï Smaller de
28 sign 24 ADCSS - Wednesday, November 12t
sign 24 ADCSS - Wednesday, November 12th, 2019 DARWIN SoC ARCHITECTURE 25 ADCSS - Wednesday, November 12th, 2019 DARWIN OBC RESSOURCES â PL ï Developement Version ï ZYNQ 7030 (NINANO Board) ï NINANO design ï 1 CAN ï 1 UART ï 1 SPW ï 1 I²C ï 1 GNSS ï 1 TMTC 26 ï HYPE
29 RION design ( 7100 Zynq ) ï 3 CAN ï
RION design ( 7100 Zynq ) ï 3 CAN ï 8 UART ï 5 SPW ï 1 I²C ï 1 GNSS ï 2 TMTC ï Estimation 50% LUT 30% FF 30% BRAM Ninano Design ADCSS - Wednesday, November 12th, 2019 DARWIN OBC RESSOURCES â PS 27 ï Estimations of CPU load is : ï Time Partitionning (main contribut
30 ors ) ADCSS - Wednesday, November 12th,
ors ) ADCSS - Wednesday, November 12th, 2019 DARWIN â CURRENT STATE ï Tested ï Standalone IPs ï Generic TMTC format using generic Database ï Test end - to - end from TC sending until TM receiving through actuation ï SST partition with SST in tracking mode ï Currently
31 validating AOCS SW ï Yet to be teste
validating AOCS SW ï Yet to be tested ï Closed AOCS loop ï Test of HYPERION 28 AGENDA ï DARWIN HISTORY AND GOALS ï AVIONIC AND ELECTRICAL ARCHITECTURE ï HYPERION ï BOMO ï DARWIN DEMONSTRATION ï CONCLUSION 29 ADCSS - Wednesday , November 12th, 2019 ADCSS - Wednesday,
32 November 12th, 2019 CONCLUSION YET TO B
November 12th, 2019 CONCLUSION YET TO BE DONE: ï Complete demonstration on closed loop AOCS ( end of November ) TO GO FURTHER⦠ï TMTC encryption ï Demonstration with HYPERION and BOMO ï « FLATSAT » 30 ADCSS - Wednesday, November 12th, 2019 CONCLUSION CONSIDERATIONS: ï IP
33 Integration from various companies ï I
Integration from various companies ï IP protection ï Responsability following integration (Validation, Anomalies) ï Strategic c omponents procurement to aim « low - cost » products ï Lowering « space quality » expectations for the new - space market ? 31 THANK YOU FOR YOUR ATTENT
34 ION Contact information : Pierre.spizzi@
ION Contact information : Pierre.spizzi@cnes.fr ADCSS - Wednesday, November 12th, 2019 DARWIN - AROUND OBC CENTRALIZATION 33 GOAL: ADCSS - Wednesday, November 12th, 2019 DARWIN SoC ARCHITECTURE ï Zynq - 7000 devices ï ARM Cortex - A9 processors integrated ï 28nm based programma