System Programming - PowerPoint Presentation

Slide1

System Programming

Chih-Hung WangChapter 1: Background (Part-1)參考書目Leland L. Beck, System Software: An Introduction to Systems Programming (3rd), Addison-Wesley, 1997.

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Outline of Chapter 1

System Software and Machine ArchitectureThe Simplified Instructional Computer (SIC)Traditional (CISC) MachinesComplex Instruction Set ComputersRISC MachinesReduced

I

nstruction

Set Computers

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System Software vs. Machine Architecture

Machine dependentThe most important characteristic in which most system software differ from application software e.g. assembler translate mnemonic instructions into machine codee.g. compilers must generate machine language codeMachine architecture differs in:

Machine code

Instruction formats

Addressing modeRegistersMachine independentThere are aspects of system software that

do not directly depend upon the type of computing system

e.g. general design and logic of an assemblere.g. code optimization techniques

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System Software and Architecture

System software will be discussed:The basic functionsMachine-dependent functionsMachine-independent functionsDesign options (single-pass vs. multi-pass)Examples of implementations4Slide5

The Simplified Instructional Computer (SIC)

SIC is a hypothetical computer that includes the hardware features most often found on real machines.Why the simplified instructional computerTo avoid various unique features and idiosyncrasies of a particular machine.To focus on central, fundamental, and commonly encountered features and concepts.Two versions of SICstandard model (SIC)extension version (SIC/XE)Upward compatiblePrograms for SIC can run on SIC/XE

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SIC Machine Architecture (1/5)

Memory215 (32,768) bytes in the computer memory3 consecutive bytes form a word 8-bit bytesRegisters6Slide7

SIC Machine Architecture (2/5)

Data FormatsIntegers are stored as 24-bit binary numbers; 2’s complement representation is used for negative valuesNo floating-point hardwareInstruction FormatsAddressing Modes7

x

: indicate

indexed-addressing mode

() are used to indicate the content of a register.Slide8

SIC Machine Architecture (3/5)

Instruction Setload and store: LDA, LDX, STA, STX, etc.integer arithmetic operations: ADD, SUB, MUL, DIV, etc.All arithmetic operations involve register A and a word in memory, with the result being left in the registercomparison: COMPCOMP compares the value in register A with a word in memory, this instruction sets a condition code CC to indicate the result

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SIC Machine Architecture (4/5)

Instruction Setconditional jump instructions: JLT, JEQ, JGTthese instructions test the setting of CC and jump accordinglysubroutine linkage: JSUB, RSUBJSUB jumps to the subroutine, placing the return address in register LRSUB returns by jumping to the address contained in register L9Slide10

SIC Machine Architecture (5/5)

Input and OutputInput and output are performed by transferring 1 byte at a time to or from the rightmost 8 bits of register AThe Test Device (TD) instruction tests whether the addressed device is ready to send or receive a byte of dataRead Data (RD)Write Data (WD)10Slide11

SIC Programming Examples

Data movement Fig. 1.2Arithmetic operation Fig. 1.3Looping and indexing Fig. 1.4, Fig. 1.5Input and output Fig. 1.6Subroutine call Fig. 1.711Slide12

SIC Programming Examples (Fig 1.2)-- Data movement

12Assembler directives for defining storage

Address labelsSlide13

SIC Programming Example

-- Arithmetic operation (Fig 1.3)

BETA=ALPHA+INCR-ONE

DELTA=GAMMA+INCR-ONE

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All arithmetic operations are performed using register A, with the result being left in register A.Slide14

SIC Programming Example

-- Looping and indexing (Fig. 1.4)14Slide15

SIC Programming Example

-- Looping and indexing (Fig. 1.5)ArithmeticArithmetic operations are performed using register A, with the result being left in register ALooping (TIX)(X)=(X)+1compare with operandset CC

Break...

GAMMA[I]=ALPHA[I]+BETA[I]

I=0 to 100

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SIC/XE Machine Architecture (

1)Memory220 bytes in the computer memoryMore Registers16Slide17

SIC/XE Machine Architecture (

2)Data FormatsFloating-point data type: frac*2(exp-1024)frac: 0~1exp: 0~204717

For

normalized floating-point numbers,

t

he high-order

bit must be

1.Slide18

SIC/XE Machine Architecture (

3)Instruction formats

No memory reference

Relative addressing

Extended address field

for target address calculation

SIC

e=0

e=1

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SIC/XE Machine Architecture

(4)

Addressing modes:

two new

relative addressing

for format 3

Direct

addressing

for formats 3 and 4 if

b=p=0

Indexed addressing

can be combined if x=1:

the term (x) should be added

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SIC/XE Machine Architecture

(5)Bits x,b,p,e: how to calculate the target addressrelative, direct, and indexed addressing modesBits i and n: how to

use

the target address (TA)

i=1, n=0: immediate addressingTA is used as the operand value, no memory referencei

=0, n=1:

indirect

addressingThe word at the TA is fetchedValue in this word is taken as the address of the operand value

i

=0, n=0 (in SIC), or

i

=1, n=1 (in SIC/XE):

simple

addressing

TA is taken as the address of the operand value

Any of these addressing modes can also be combined with

indexed addressing

.

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SIC/XE Machine Architecture

(6)For upward compatibility8-bit binary codes for all SIC instructions end in 00If n=i=0, bits b,p,e are considered as part of the 15-bit address field

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SIC/XE Machine Architecture

(7)How to compute TA?How the target address is used?Note: Indexing cannot be used with immediate or indirect addressing modes

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SIC/XE Machine Architecture

(8)Instruction Setnew registers: LDB, STB, etc.floating-point arithmetic: ADDF, SUBF, MULF, DIVFregister move: RMOregister-register arithmetic: ADDR, SUBR, MULR, DIVRsupervisor call: SVCgenerates an interrupt for OS (Chap 6)Input/OutputSIO, TIO, HIO: start, test, halt the operation of I/O device (Chap 6)

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SIC/XE Machine Architecture (9)

Example. RSUBExample. COMPR A, SExample. LDA #3 (Format 3)24Slide25

SIC/XE Machine Architecture (10)

Example. +JSUB RDREC (Format 4)Example. 1056 STX LENGTH25Slide26

SIC/XE Machine Architecture (11)

Example. 0000 STL RETADRExample. LDA LENGTH (direct addressing)26Slide27

SIC/XE Machine Architecture (12)

Example. STCH BUFFER, XExample. LDA #927

[B]=0033

disp

=3Slide28

SIC/XE Machine Architecture (13)

Example. 002A J @RETADR (indirect addressing)28Slide29

c: constant between 0 and 4095

m: memory address or constant larger than 4095

S:Compatible with SIC

A: Relative addressing

D: Direct addressing

4: Format 4

SIC/XE Machine Architecture (14)

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SIC/XE Machine Architecture (

15)30Slide31

SIC/XE Machine Architecture (

16)Instruction setLoad and store registersLDA, LDX, STA, STX, LDB, STB, …Integer arithmetic operations ADD, SUB, MUL, DIV, ADDF, SUBF, MULF, DIVF, ADDR, SUBR, MULR, DIVR

Comparison

COMP

Conditional jump instructions (according to CC)JLE, JEQ, JGT

Subroutine linkage

JSUB

RSUB

Register move

RMO

Supervisor call (for generating an interrupt)

SVC

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SIC/XE Machine Architecture (

17)Input and outputIO device Three instructions:Test device (TD)Read data (RD) Write data (WD)IO channelsPerform IO while CPU is executing other instructionsThree instructions:

SIO:

start

the operation of IO channelTIO: test the operation of IO channelHIO:

halt

the operation of IO channel

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SIC/XE Machine Architecture (

18): I/O MechanismsPolling I/OInterrupt-Driven I/ODMA (Direct Memory Access) I/O33Slide34

SIC/XE Instruction Set

P: privileged

X: only for XE

F: floating-point

C: set CC

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for interrupt

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Set Storage Key for memory protection

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SIC/XE

Programming Example (1)39Slide40

SIC/XE Programming Example

(2)40Slide41

SIC/XE Programming Example

(3)41Slide42

SIC/XE Programming Example

(4)42