/
Hardware Components 1 Lesson 3 Hardware Components 1 Lesson 3

Hardware Components 1 Lesson 3 - PowerPoint Presentation

alida-meadow
alida-meadow . @alida-meadow
Follow
347 views
Uploaded On 2018-11-08

Hardware Components 1 Lesson 3 - PPT Presentation

0x003 011 Modified and presented by Mohamed Zaki Topics Simple Computer Architecture CPU Architecture CPU Registers Executing instruction Instruction set types Memory Devices Bus Systems ID: 722371

data memory address bus memory data bus address ram cpu cache program rom instructions instruction storage computer size main

Share:

Link:

Embed:

Download Presentation from below link

Download Presentation The PPT/PDF document "Hardware Components 1 Lesson 3" is the property of its rightful owner. Permission is granted to download and print the materials on this web site for personal, non-commercial use only, and to display it on your personal computer provided you do not modify the materials and that you retain all copyright notices contained in the materials. By downloading content from our website, you accept the terms of this agreement.


Presentation Transcript

Slide1

Hardware Components

1

Lesson 3 0x003011

Modified and presented by : Mohamed Zaki Slide2

Topics

Simple Computer ArchitectureCPU ArchitectureCPU RegistersExecuting instructionInstruction set types

Memory DevicesBus SystemsInput / Output Architecture2Slide3

COMPUTER ARCHITECTURE Von Neumann Architecture

CPU/

ProcessorMain MemoryAddress Bus

Data Bus

Control Bus

Input

& Output Devices Slide4

Examples of CPUs

Based on the manufacturer:Intel:

CeleronPentium I.Pentium MMX. ( Multimedia Extension)Pentium II. Pentium III.Pentium 4.Centrino. ( Mobile Technology)Core 2 DUODual coreQuad core Core i series (Laptop, Desktop, and Mobile Device Processors

)Xeon (Server and Workstation Processors)

AMD.ARM

Dual Core A4,A5, A6

ARM Cortex-A9 MPCore

(for iPad & iPhone and others)

4Slide5

CPU Architecture

CPU:

Is the part of a computer in which arithmetic and logical operations are performed and instructions are decoded then executed.CPU Components:ALU ( Arithmetic and Logic Unit) CU (Control Unit)Registers:Are high speed & small in size temporary memory storage areas used during data manipulation ( calculation , comparison , etc..)The clock:It is a circuit for generating pulses that enable computer components to work in an ordered manner .5

CPU : Central Processing Unit. Also called

ProcessorSlide6

CPU Architecture

101010

100001

001010

010100

010100

100001

؟

؟

؟

؟

؟

6

Control Unit

MAR

MBR

Program Counter

Register

ALU

GENERAL PURPOS

REGISTER

Main Memory / RAM / Primary Memory

CIR

Bus : set of wires Slide7

CPU Registers

General purpose registers: are used to hold data before and after it is manipulated. Also used for many operation such addition, subtraction multiplication and logic operations

Special Purpose Registers:Program counter PC: it is loaded with the address in memory of the first instruction location of a program. After fetching, it is increased to point to the next location.Memory Buffer register MBR: all data and instructions pass in and out from the main storage through MBR.Current instruction register CIR:an instruction to be performed will be taken from the main storage via the MBR and placed in register IR.

Memory address register MAR

: prior to each transfer between the MBR and main storage , the exact source or destination of data in the main storage must be specified by MAR.

7Slide8

Executing a Software

Program

8Copy PC contents into MAR & Initiate a memory read

Increment the PC

Copy the instruction

Which is in the MBR into CIR

Decode the CIR

Execute the instruction

The chart shows the steps that the CPU uses to execute a software Slide9

Instruction set types

Arithmetic and Logic inst. Set:

Such as addition, subtraction, multiplication, Increment, decrement, and logical operations, Such as add, sub,mul.I/O instructions:To transfer data between peripherals and memory, or between peripherals and accumulator, Such as movProcessor reference instructions:To stop the microprocessor activities. Such as halt.

Fetch (Load) and store instruction:

To transfer the data between accumulator and memory, Such as load

Memory reference instructions:

To access the memory during their execution, it is both Load + store instructions.

Transfer of control, or branch instruction

: (Executing a Program)

To change the program sequence. Such as

jmp

9

Each CPU has a set of instructions Slide10

Memory DevicesAny memory is constructed from a collection of memory cells, each having unique address.

Each cell contains a combination of binary data(0 or 1).Types of Memory:RAM.

ROM.Cache Memory.10Slide11

Random Access Memory (RAM)

It also called Main or Primary Memory.Programs & Data are stored there before processing .

The larger amount of RAM, the quicker programs will run.More than one type of RAMs are used in modern PCs, like DRAM(Dynamic RAM) and SDRAM(Synchronous DRAM)The data will be lost if the power is cut(Volatile Memory). 11Slide12

Read Only Memory (ROM)

It holds the firmware program (BIOS).

It starts the POST “ power on self test” programIt contains auto-startup program that will load the necessary OS programs in RAM. The information remains in the ROM when the computer turned off. ( Nonvolatile Memory)12Slide13

The Differences between ROM and RAM:

13

ROM (Read Only Memory)RAM (Random Access Memory)

Used to store part of O.S. by the factory.

ROM can be used for read only, we can't write or modify any thing on the ROM.

Not volatile memory (i.e. the information remains in the ROM when the computer turned off)

Used to store programs such as accounting program, games, word processor by the user.

We can use the RAM for read and write data.

Volatile memory (i.e. the information in the RAM is removed when the power turned off)Slide14

Cache Memory

Is a small memory, located close to the processor?Some processors are built with internal cache memory.

It has much shorter access time than the RAM. Therefore, it is used to hold instructions and data that has recently been accessed.There are two types of cache memory: L1 and L2.L1 ( Level 1) internal cache, built in with in the CPU.L2 ( Level 2) external cache, built in with in the Motherboard, L2 is lager than L1. ( A+ Book p 131)14Slide15

CPU, RAM, and Cache Diagram

15

CPUCacheRAM

Write through cache.

Write back cache.Slide16

Hard Disk

16Slide17

Hard Disk

is a data storage device used for storing and retrieving digital information using rapidly rotating discs (platters) coated with magnetic material.A magnetic heads arranged on a moving arm to read and write data to the surfaces.Slide18

Sector

Track

Magnetic polarity determines the bit value (1,0)

Bit Value is 1

Bit Value is 0

Disk Organization

0 0 1 0 1 1 1 0

The

Format

Command

is used to create Tracks and SectorsSlide19

Other Storage Devices

Flash Memory DVD Disks Magnetic Tapes Slide20

Storage Device Hierarchy

Registers

Cache

Main Memory

Flash Memory

Hard Disks

Magnetic Tapes

Size

Bytes

M Bytes

G Bytes

G Bytes

G – T Bytes

T Bytes

Speed

1

nsec

10

nsec

100

nsec

msec

msec

sec -min

Hard Disk

and

Tapes

have mechanical movements

Others

do not have and called Solid Sate Devices (SSD)

Slide21

Bus Systems (Connecting them together )

Is a collection of parallel electrical lines which connect the computer components.The buses used to transfer:

Data signals.Address signals.Control signals.Power.21Slide22

Bus Systems

The address bus is the set of wires carrying the addressing information used to describe the memory location, which the data is being sent or retrieved.The size of the address bus indicates the maximum amount of RAM that a chip can address.

Size of memory that can be addressed= 2LWere L = No. of Lines in address bus ( Size of address bus)22Address BusSlide23

Bus Systems

Size of address bus

Size of memorySize of address busSize of memory12116216 ~= 64 KB222 =4

20220 ~= 1 MB

323

=8

30

2

20

=1 GB

4

2

4

=16

32

2

32

=4 GB

:

:

:

:

10210

=1024=1KB11

211=210x21=2 KB

12

2

12

=2

10

x2

2

=4 KB

23

Address BusSlide24

Bus Systems

Examples:1) how many addresses can be built by 3 digits (3 lines):

2n = 23 = 8 address bus locations from ( 000 to 111 ) 2): how many addresses can be built by 3 digits (3 lines):2n = 23 = 8 address bus locations from ( 000 to 111 )24

Address BusSlide25

Input / Output Architecture

The computer has the ability to send and receive data to and from other devices.We can transfer data in parallel and serial lines.When the CPU wishes to send data to a particular I/O devices it places a unique identity code ( address ) onto the address line.

Only the device that recognizes that code will respond to the command that is placed on the control line.25