Y Kwon i n exploration with J Lajoie E Kistenev A Sukhanov and Z Li as part of MPCEX RampD Si sensor in general M ature technology Reliable performance Fine granule Higher energy and time resolution than gaseous ionization detectors ID: 1030818
Download Presentation The PPT/PDF document "Low C ost S ilicon Sensor" is the property of its rightful owner. Permission is granted to download and print the materials on this web site for personal, non-commercial use only, and to display it on your personal computer provided you do not modify the materials and that you retain all copyright notices contained in the materials. By downloading content from our website, you accept the terms of this agreement.
1. Low Cost Silicon SensorY. Kwonin exploration with J. Lajoie, E. Kistenev, A. Sukhanov, and Z. Lias part of MPC-EX R&D
2. Si sensor in generalMature technologyReliable performanceFine granule Higher energy and time resolution (than gaseous ionization detectors) Key burden is cost.2
3. 3
4. 6 inch fabrication line8 inch fabrication lineR&D environment1 cm2 ~ $ 2Possibility in Korea
5. ETRI/NNFCETRIEstablished PIN-type silicon sensor. = 0.4 , 6 inch line.Founded by government & self-sustaining for 6 years.NNFCPIN-type sensor fabrication process needs establishment.SiPM fabrication. = 0.18 , 8 inch line (inefficient 4 & 6 inch support).Founded by government & government subsidy. terminated last year.
6. Traditional Si sensor operation-6
7. DC/AC coupled sensors
8. Conventional AC-coupled sensor structure
9. An implementation at ETRI
10. How do we make it? (CMOS process)High purity Si waferOxidationIon implantOxide layer depositionEtch for contactMetal layer depositionPassivation10
11. Actual process sheet
12. Our collaboration modelZ. Li : Design/Process schematicsETRI : Suggestion/FabricationA. Sukhanov : Coupling to electronicsY. Kwon, E. Kistenev, J. Lajoie : Implementation, Quality control, follow-up, identification of main issuesKorean MPC-Ex groups : Test
13. Structure with Al-overhangp+- implant, 20keV B, 1x1015/cm2
14. n+ Implant (40 keV Ph, 1x1012/cm2) channel stopper addedn+ Implant (40 keV Ph, 1x1015/cm2)
15. Nit=2E11/cm2; Bias: 200 V
16. Mask layers(DC coupled sensor)“p+”“n+”“contact”“metal”“passivation”
17. “p+”
18. “n+”
19. “contact”
20. “metal”
21. “passivation”
22. Processed Wafer22
23. DicingKey origin of trouble : Two sensors on one waferWhen we use diamond saw (mechanical dicing), we have to use sticky tape to hold pieces still while in dicing. We couldn’t avoid exerting stresses to the sensor edges when we remove those sticky tapes after dicing.Solution : ExpanderDicing company suggested expander. No change in leakage current up to the bias of 3 x full depletion voltage.
24. Where problems are …~70 ~70
25. Expander
26. After corrected procedure
27.
28. Photocurrent measurement(LED 1070 nm)
29. Middle, 2V
30. Middle, 8V
31. Middle, 16V
32. In-between, 2V
33. In-between, 8V
34. In-between, 16V
35. In-between, 32V
36. GR, 2V
37. GR, 8V
38. GR, 16V
39. GR, 32V
40. What is the issue?(1070 nm)
41. Diffusion vs DriftVery high resistivity > 20 kcmLifetime > ms e(h) thermal velocity : 2.3 (1.6) x 105 m/sCharge collection by diffusion when not by drift
42. New efforts?(ALICE induced)Readout ASIC Preamp + ADC + memory + triggerBuilt contact with CMOS image sensor expert.Running local MPW.KORIA might make some investment.Small scale funds might work… (Local grant application?)