Research Directions for 21

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st. Century Computer Systems. . ASPLOS . 2013 . Panel. 0. Mark Hill: . Introduction. Kathryn . McKinley. on NAS . Report. The . Future of Computing . Performance. : Game Over or . Next Level?. Josep. ID: 462236 Download Presentation

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Research Directions for 21




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Slide1

Research Directions for 21st Century Computer Systems ASPLOS 2013 Panel

0. Mark Hill:

IntroductionKathryn McKinley on NAS ReportThe Future of Computing Performance: Game Over or Next Level?Josep Torrellas on CCC WorkshopsAdvancing Computer Architecture Research (ACAR)Mark Hill on ISAT WorkshopAdvancing Computer Systems without Technology ProgressSarita Adve on CCC White Paper21st Century Computer ArchitectureEmmett Witchel unbounded

Impact? $15M NSF XPS (Exploiting Parallelism & Scalability) cites 1 & 4.

Q: Do to facilitate, transcend, or refute these partially overlapping visions?

Slide2

The

Future

of Computing

Performance:

Game Over or Next Level?

Thanks to Sam Fuller & Mark Hill

Samuel H. Fuller

, Chair

March 22, 2011

Computer Science and Telecommunications Board (CSTB)

National

Research Council (NRC)

Slide3

Committee On Sustaining Growth In Computing Performance

Experts Addressed the Problem

SAMUEL

H. FULLER

, Analog Devices Inc., ChairLUIZ ANDRÉ BARROSO, Google, Inc.ROBERT P. COLWELL, Independent ConsultantWILLIAM J. DALLY, NVIDIA Corporation and Stanford UniversityDAN DOBBERPUHL, PA Semi/ApplePRADEEP DUBEY, Intel CorporationMARK D. HILL, University of Wisconsin–MadisonMARK HOROWITZ, Stanford UniversityDAVID KIRK, NVIDIA CorporationMONICA LAM, Stanford UniversityKATHRYN S. McKINLEY, University of Texas at AustinCHARLES MOORE, Advanced Micro DevicesKATHERINE YELICK, University of California, BerkeleyStaffLYNETTE I. MILLETT, Study DirectorSHENAE BRADLEY, Senior Program Assistant

3

Slide4

Executive Summary

Computer hardware has transitioned to multicore

Dennard

scaling of CMOS has broken

down

Parallelism

and locality must be exploited by

software

Chip

power will soon limit multicore

scaling

Slide5

Virtuous Cycle

5

Devices 2x more capable, efficient, cheaper, smaller, …

d

oubling of transistors

Hardware Complexity

Sequential Interface

Software

Innovation

Software Complexity

Sequential Interface

Slide6

Breaks in Virtuous Cycle

6

Devices 2x more capable, efficient, cheaper, smaller, …

d

oubling of transistors

Hardware Complexity

Sequential Interface

Software

Innovation

Software Complexity

Sequential Interface

e

nd of Dennard Scaling

Sequential

I

nterface

Slide7

Next StepsInnovate within and across layers

AlgorithmsProgramming “systems”ArchitectureTechnologyEducation

7

Slide8

Community

No news here? But…

Are

we all acting on this knowledge or

are we acting business

as usual

?

Are we thinking beyond next paper to where to create future value?

Denial

Acceptance

 Act?

Slide9

2. Advancing Computer Architecture Research (ACAR)

Two workshops sponsored by CCC25 + 19 attendeesOrganizers: J. Torrellas (U Illinois) & M. Oskin (U Wash.)Issued a community-wide call for white papersSelection committee picked most relevant papersIncluded industry folksAlso invited DARPA, DOE, NSF program managers

http://www.cra.org/ccc/docs/ACAR_Report_Popular-Parallel-Programming.pdf

http://www.cra.org/ccc/docs/ACAR2-Report.pdf

Slide10

What We Found

Data centers and extreme scale computing

Specialized architectures and heterogeneity

Ultimate goal: fully automated generation of app-specific HW for programs

Architectures for programmability

Performance scaling:

Past: no SW changes

Now: extensive SW+HW changes

Energy and power consumption are the key limiters

Slide11

End of road for conventional ISA

Modern systems are skyscrapers built on the ISA of a bungalow

Secure, reliable and predictable from the HW up

Foundation of computing is breaking apart; malicious parties are exploiting it

What We Found

Architecture research enables new technologies to enter the market quickly

Exploiting emerging technologies

Slide12

Discussion Points

Many directions of research are relevant:

Computer systems research is broadening

Focus on increasing

funding

pie, not re-distributing

it

Need to create coalitions with other communities:

Big data

New computing materials and devices

Healthcare

Need to move away from

incrementalism

Slide13

Advancing Computer Systems without Technology Progress

13

System Capability (log)

8

0s

90s

0

0s

10s

20s

30s

40s

CMOS

Fallow Period

New Technology

Our Focus

5

0s

The views expressed are those of the author and do not reflect the official policy or position of the Department of Defense or the U.S. Government.

Approved for Public Release, Distribution Unlimited

Seek ~1000x = two decades of Moore Law via four thrusts

Slide14

A. Spectrum of Hardware Specialization

MetricOps/mm2Ops/WattTime to SolnNRENormalized to General-Purpose111(programming GPP)1Specialized ISA(domain specific)1.53-52-3(designing & programming)1.5Progr. Accelerator(domain specific)35-102-3(designing & programming)2-3Fixed Accelerator(app specific)5-101010(SoC design)3-5Specialized Mem & Interconnect (monolithic die)101010(SoC design)10Package level integration(multi die: logic,mem,analog)10+10+5(silicon interposer)5

Approved for Public Release, Distribution Unlimited

Slide15

Can we achieve PHP productivity at BLAS efficiency?

PHP9,298,440 ms51,090xPython6,145,070 ms33,764xJava348,749 ms1816xC19,564 ms107xTiled C12,887 ms71xVectorized6,607 ms36xBLAS Parallel182 ms1

Approved for Public Release, Distribution Unlimited

C. Reduce Software Bloat

(e.g., matrix multiply)

Slide16

D. Locality-aware Parallelism

Now: Seek (vast) parallelisme.g., simple, energy efficient coresBut remote communication >100x cost of compute

16

Approved for Public Release, Distribution Unlimited

= 1200

pJ

(24x)

Slide17

C. Approximate Computing Example

SECOND ORDER DIFFERENTIAL EQUATION ON ANALOG ACCELERATOR WITH DIGITAL ACCELERATOR.

Approved for Public Release, Distribution Unlimited

Slide18

Workshop Takeaway

Can Harvest in the “Fallow” Period!A. HW/SW Specialization/Co-designB. Reduce SW BloatC. Approximate Computing---------------------------------------------------~1000x = 2 decades of Moore’s Law!D. Systems must exploit LOCALITY-AWARE parallelismHILL’s TWO CENTS: Move beyond General-PurposeSystems that do new things, e.g., KinectOptimizations that help some, e.g., big memory workloads

18

Approved for Public Release, Distribution Unlimited

Slide19

21st Century Computer Architecture A Community White Paper, April-May 2012

+ Jim Larus & Jeannette Wing gave feedback+ CCC, Erwin Gianchandani, Ed Lazowska guided process

19

Mark D. Hill, U Wisconsin (coordinator)

Sarita Adve, U Illinois

David H. Albonesi, Cornell U

David Brooks, Harvard U

Luis Ceze, U Washington

Sandhya

Dwarkadas

, U Rochester

Joel

Emer

, Intel/MIT

Babak

Falsafi

, EPFL

Antonio

Gonzalez

, Intel/UPC

Mary Jane Irwin, Penn State U

David Kaeli, Northeastern U

Stephen W.

Keckler

, NVIDIA/U Texas

Christos

Kozyrakis

, Stanford U

Alvin

Lebeck

, Duke U

Milo Martin, U Pennsylvania

José F.

Martínez

, Cornell U

Margaret Martonosi, Princeton U

Kunle

Olukotun

, Stanford U

Mark

Oskin

, U Washington

Li-

Shiuan

Peh

, M.I.T.

Milos

Prvulovic

, Georgia Tech

Steven K. Reinhardt, AMD

Michael Schulte, AMD/U Wisconsin

Simha

Sethumadhavan

, Columbia U

Guri

Sohi

, U Wisconsin

Daniel

Sorin

, Duke U

Josep Torrellas, U Illinois

Thomas F.

Wenisch

, U Michigan

David Wood, U Wisconsin

Katherine

Yelick

, UC Berkeley/LBNL

Slide20

Technology’s Challenges

Late 20th CenturyThe New RealityMoore’s Law —2× transistors/chipTransistor count still 2× BUT…Dennard Scaling —~constant power/chipGone. Can’t repeatedly double power/chipModest (hidden) transistor unreliabilityIncreasing transistor unreliability can’t be hiddenFocus on computation over communication Communication (energy) more expensive than computation1-time costs amortized via mass marketOne-time cost much worse &want specialized platforms

How should architects step up as technology falters?

Slide21

21st Century Computer Architecture

20th Century21st Century Single-chip in stand-alone computerArchitecture as Infrastructure: Spanning sensors to cloudsPerformance plus security, privacy, availability, programmability, …  Cross-Cutting:Break current layers with new interfacesPerformance via invisible instructionlevel parallelismEnergy FirstParallelismSpecializationCross-layer designPredictable technologies: CMOS, DRAM, & disksNew technologies (non-volatile memory, near-threshold, 3D, photonics, …) Rethink: memory & storage, reliability, communication

21

X

X

Slide22

Some Thoughts

N

eed to step up for agency positions

Architecture

PL

OS

ASPLOS 2014

???

???

ASPLOS

NSF CCF Division Director Search

Slide23

5

.

Emmett

Witchel

U

nbounded

Slide24

The 90s

SUCKED

Slide25

Jerry Garcia

Dead1995

Slide26

The Verve

The Verve PIPE

Slide27

ArchitectureWas

Boring

Slide28

IntelDateµArchClockInt9505/96Pentium13304.210/97Pentium II26610.809/98Pentium II45017.3

DEC AlphaDateµArchClockInt9503/962106426604.304/972116450014.409/982116453316.8

Architecture

Microarchitecture

or

Clock rate

1. Buy machine2. Wait 18 months3. Buy next one

microarchitecture

provides performance

Slide29

Life is better

now

Slide30

architecture changesprovide value

IntelDateµArchArch01/10WestmereAES-NI01/11Sandy BridgeInstruction for SHA-109/11Ivy BridgeRdRand

VT-x (11/05)Extended Page Tables (11/08)VT-d (11/08)VPID (11/08) (tagged TLB!)

1. Consider app

2. Buy machine

3.

Goto

1

Slide31

Hardware + Software Cooperation necessary

SecurityMobileData centersConcurrencyGPU/Accelerator

The ‘10s

belong to

ASPLOS

Slide32

Research Directions for 21st Century Computer Systems ASPLOS 2013 Panel

0. Mark Hill:

Introduction

Kathryn

McKinley

on NAS

Report

The

Future of Computing

Performance

: Game Over or

Next Level?

Josep

Torrellas

on CCC

Workshops

Advancing

Computer Architecture

Research

(ACAR

)

Mark

Hill

on ISAT

Workshop

Advancing

Computer Systems without

Technology Progress

Sarita

Adve

on CCC White

Paper

21st

Century Computer

Architecture

Emmett

Witchel

unbounded

Slide33

Kathryn S. McKinley

Kathryn S. McKinley is a Principal Researcher at Microsoft and an Endowed Professor of Computer Science at The University of Texas at Austin. She and her collaborators have produced widely used tools: the DaCapo Java Benchmarks, TRIPS Compiler, Hoard memory manager, MMTk garbage collector toolkit, and Immix garbage collector. Her awards include: NSF Career, ASPLOS 2009 Best Paper, 2012 IEEE Top Picks, CACM Research Highlights (2006, 2012), Most Influential OOPSLA Paper from 2002 (awarded 2012), the 2011 ACM SIGPLAN Distinguished Service Award, and the 2012 ACM SIGPLAN Programming Languages Software Award. She has graduated 17 PhD students. She is an IEEE Fellow and ACM Fellow.

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Slide34

Josep Torrellas

Josep Torrellas is a Professor of Computer Science at the University of Illinois Urbana-Champaign. He is the Director of the Center for Programmable Extreme Scale Computing, and the Director of the Illinois-Intel Parallelism Center (I2PC). He has also been a Willett Faculty Scholar and lead the OpenSPARC Center of Excellence. He is the past Chair of the IEEE Technical Committee on Computer Architecture, and currently serves as a Council Member of CRA's Computing Community Consortium. He is a Fellow of IEEE and ACM. He has made many technical contributions in the areas of shared-memory parallel computer architecture, low-power design, hardware reliability, and software dependability. He has graduated 30 Ph.D. students, who are now leaders in academia and industry. He is currently working on the Bulk Multicore Architecture, and on the DARPA-funded Runnemede Extreme Scale Architecture, both in collaboration with Intel.

34

Slide35

Mark Hill

Mark D. Hill (www.cs.wisc.edu/~markhill) is professor in both the computer sciences department and the electrical and computer engineering department at the University of Wisconsin--Madison, where he also co-leads the Wisconsin Multifacet (www.cs.wisc.edu/multifacet/) project with David Wood. His research interests include parallel computer system design, memory system design, computer simulation, deterministic replay and transactional memory. He earned a PhD from University of California, Berkeley. He is an ACM Fellow and a Fellow of the IEEE.

35

Slide36

Sarita Adve

Sarita Adve is Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her research interests are in computer architecture and systems, parallel computing, and power and reliability-aware systems. Her honors include the Anita Borg Institute Women of Vision award in innovation, the ACM SIGARCH Maurice Wilkes award, the University Scholar recognition by the University of Illinois, and an Alfred P. Sloan Research Fellowship. She is a fellow of the ACM and the IEEE. She serves on the boards of the Computing Research Association and ACM SIGARCH. She received the Ph.D. in Computer Science from the University of Wisconsin-Madison in 1993.

36

Slide37

Emmitt Witchel

Emmett Witchel is an associate professor in computer science at The University of Texas at Austin.  He and his group are interested in operating systems, security, and architecture.  Most of his current research is about secure systems, GPU systems, and concurrent systems. He received his doctorate from MIT in 2004.

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