PIM:Port Information MachinePRS:Port Role Selection MachinePRT:Port Ro - PDF document

PIM:Port Information MachinePRS:Port Role Selection MachinePRT:Port Role Transition MachinePST:Port State Transition MachineRCM:Role Confirmation MachineTCM:Topology Change MachinePPM:Port Protocol Migration MachinePRI:Port Role Information State MachinePTX:Port Transmit MachinePTI:Port TImers Machine rcvdMsg, infoIs, reselect,portInfo, syncReq, inSync, updtInfooperEdge, adminEdge,rcvdNew, rcvdOld rootInfo rootInfo selectedRolereselect txCount fdWhile, rrWhile, rbWhile RSTP STATE MACHINES - AN OVERVIEW portInfo rcvdNew sendNewnewInfo TRANSITIONS(PER PORT) learnlearningreRootforwardingforward (PER PORT) infoAge tcWhile rcvdTcrolesync helloWhen tcWhile role tcProp syncReq tick operEdge role newInfo updtInfo newInfo, tcAck sync infoIs = Aged;reselect = TRUE; inSync = syncReq = FALSE; DISABLED updtInforcvdBpdu portEnabled updtInfo = FALSE;inSync = sync = FALSE;infoIs = Mine; newInfo = TRUE;(!reselect && updtInfo) (infoIs == Received) && (infoAge == 0) && !updtInfo &&!reselect && !rcvdBpdu (rcvdMsg == BetterDesignatedMsg) (updtInfo && !reselect) UCTBEGIN PIM: PORT INFORMATION MACHINE (PER PORT) updtInfoAge();inSync = sync = FALSE;syncReq = recordSyncReq();infoIs = Received; reselect = TRUE; UCTELSE operEdge = FALSE;BpduVersion();recordTcFlags();rcvdBpdu = FALSE; rcvdBpdu && !updtInfo && !reselect updtInfoAge(); UCT RcvdMsg rcvBpdu()her) RootRcvdMsg rcvBpdu()her) Root CONFIRM (rcvdMsg == ConfirmedRootMsg) selectRoles(bridge);clearReselect(bridge); reselect1 || reselect2 || ...reselectn a) (portIs == Received) and the Spanning Tree Information, without the port's own Path Cost added, is worse than the RootPort's UCT BEGIN sync = TRUE; syncPort =FALSE;reRoot = FALSE;rrWhile = 0; rbWhile = 0; UCT syncPort = syncReq = reRoot =FALSE; fdWhile = FwdDelay; !learning &&!forwarding PRT: PORT ROLE TRANSITIONS STATE MACHINE (PER PORT)PAGE 1 OF 3 : SHOWING INITIALIZATION OF THE PORT ROLE TRANSITIONS STATE MACHINE AND THE DISABLED_PORT, ALTERNATE_PORT, BACKUP _PORTAND IMMEDIATELY ASSOCIATED STATES (rbWhile != 2*Hello_time) && (fdWhile != FwdDelay) || UCT role = RootPort; syncPort = reqSync = FALSE;reRoot = FALSE; rrWhile = FwdDelay; (selectedRole == RootPort)&& (role !=selectedRole) fdWhile= FwdDelay; ROOT_LEARN reRoot = TRUE; UCTUCT(inSync || syncPort || reqSync || reRoot || (rrWhile != FwdDelay)) && !syncReq forward = TRUE; ((fdWhile == 0) || (reRooted && (rbWhile == 0))) && !learn && !syncReqPRT: PORT ROLE TRANSITIONS STATE MACHINE (PER PORT)PAGE 2 OF 3 : SHOWING THE ROOT PORT STATES((fdWhile == 0) || (reRooted && (rbWhile == 0))) && learn && !forward && !syncReq UCT newInfo = TRUE; {/* Sets syncPort for all other ports. */ syncReq && !syncUCT !forward &&!reRootUCTreRoot && forward role = DesignatedPort; syncReq = FALSE; fdWhile= FwdDelay; UCT fdWhile = 0; ((rrWhile == 0) || !reRoot) && ((fdWhile == 0) || sync) && !syncPort) || operEdgePort) && !learnPRT: PORT ROLE TRANSITIONS STATE MACHINE (PER PORT)PAGE 3 OF 3 : SHOWING THE DESIGNATED PORT STATES reqSync = TRUE; (selectedRole == DesignatedPort) fdWhile= FwdDelay; UCT((rrWhile == 0) || !reRoot) && ((fdWhile == 0) || sync) && !syncPort) || operEdgePort) && learn && !forwardNOTE: All transtions, except UCT, qualified by "&& !reselect". UCT (rrWhile == 0)&& reRoot syncPort = reqSync = FALSE; UCT UCT (!learning &&!forwarding && !sync) ||(!forward ) &&(!sync && !reqSync) learning = TRUE; PST: PORT STATE TRANSITION MACHINE (PER PORT) forwarding = FALSE; DISCARDING forwardlearn NOTE: A small system dependent delay may occur on each of the transitions shown.!learn BEGIN ACTIVE tc = tcProp = FALSE; rcvdTcn = FALSE; rcvdTc = FALSE;tcPropagation(); TOPOLOGY CHANGE DETECTION, NOTIFICATION, PROPAGATION AND FILTERING DATABASE FLUSHING rcvdTcAck = FALSE; UCT tcPropagation();tc = FALSE; tc flush();tcProp = FALSE; tc = tcProp = FALSE; (role != Root_port) && (role != Designated_port)rcvdTc ||rcvdTcn ||UCTUCTUCTUCT(role == Root_port) ||(role == Designated_port)BEGIN tcProp &&!operEdgetcPropagation(){ /* Sets tcprop for all other ports. */ ONE_SECOND dec(rrWhile); dec(rbWhile);tick = FALSE; UCTPORT TIMERS STATE MACHINE (PER PORT)BEGIN {if(x!=0)x=x-1; msyncWhile = MigrateSync;sendOld = TRUE; mcheck = FALSE;sendNew = TRUE; ((msyncWhile == 0) && rcvdOld) BEGIN || (portInfo == Disabled) PPM: PORT PROTOCOL MIGRATION (PER PORT)((msyncWhile == 0) && rcvdNew)((msyncWhile != 0)&& (rcvdOld || rcvdNew) ((msyncWhile != 0) mcheckmcheck newInfo = FALSE; helloWhen = HelloTime; txCount = 0; UCTUCT PTX: PORT TRANSMIT MACHINE (PER PORT) UCT tcAck = FALSE;helloWhen = HelloTime; txRstp(); txCount +=1; UCT ((role == Root_port) && (((helloWhen == 0) && (tcwhile != 0)) || newInfo))){ /* Transmits a TCN BPDU. */{ /* Transmits a TCN BPDU. */ typedefenum{BetterDesignatedMsg,RepeatedDesignatedMsg,OtherMsg}RcvdMsg;typedefenum{Disabled,Mine,Received,Aged}InfoIs;typedefstruct/*StpInfo*/Priorityroot_pri;Bridge_idroot_id;Stp_costroot_cost;Prioritybridge_pri;Bridge_idbridge_id;Priorityport_pri;Port_idport_id;Centisecsmessage_age;Centisecsmax_age;Centisecsforward_delay;Centisecshello_time;