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Circuit Lower Bounds A combinatorial approach to P Circuit Lower Bounds A combinatorial approach to P

Circuit Lower Bounds A combinatorial approach to P - PowerPoint Presentation

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Uploaded On 2023-06-25

Circuit Lower Bounds A combinatorial approach to P - PPT Presentation

vs NP Shachar Lovett Computation Input Memory Program Code Program code is constant Input has variable length n Run time memory grow with input length Efficient algorithms run time memory ID: 1003041

parity depth small circuits depth parity circuits small poly size compute circuit bounds simple mod3 clique monotone approximate exponential

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1. Circuit Lower BoundsA combinatorial approach to P vs NPShachar Lovett

2. ComputationInputMemoryProgram Code Program code is constant Input has variable length (n) Run time, memory – grow with input length Efficient algorithms = run time, memory poly(n)

3. P vs NPP = problems we can solve = efficient algorithm to find solutionNP = problems we want to solve = efficient algorithm to verify solutionExamples: graph 3-coloring, satisfiability ,…

4. ChallengeHow can you prove that some computational problems require >> polynomial time?In particular, one in NPCombinatorial approach: circuitsReplace “uniform computation” by a more combinatorial object

5. CircuitsComplex computation = iteration of many small simple computationsxYZANDANDANDORMajority(X,Y,Z)

6. CircuitsComplex computation = iteration of many small simple computationsSimple = any complete basis (e.g. AND,OR,NOT)x1x2x3x4x5x6x7x8…xnf(X1,…,Xn)

7. Algorithms vs circuitsCircuits are as powerful* as algorithms: Problems with efficient (poly-time) algorithms also have poly-size circuitsRevised challenge: show poly-size circuits cannot solve all interesting computational problemsInputMemoryCodex1x2x3x4x5x6x7x8…xnf(X1,…,Xn)

8. Lower boundsGoal: show poly-size circuits cannot solve NPCan prove lower bounds for restricted circuit modelsMonotone circuitsBounded depth circuitsGeneral technique: Approximate circuit by a nice mathematical model Show the mathematical model cannot solve the problem (not even approximately)

9. Monotone circuitsMonotone circuits: circuits with just AND-OR gates (no NOT gates)Compute monotone functions (e.g clique)Can clique have poly-size monotone circuits?[Razborov’85, Alon-Boppana’87]: No. Clique requires exponential size monotone circuits

10. Monotone circuitsx1x2x3x4x5x6x7x8…xnf(X1,…,Xn)Input: n edges of graph G on mn1/2 verticesOutput: does G have large clique?Circuit: poly-size with AND-OR gatesStep 1: approximate AND-OR circuit by latticeStep 2: show lattice cannot approximate clique

11. Bounded depth circuitsx1x2x3x4x5x6x7x8…xnf(X1,…,Xn)Small depth = parallel computationEfficient algorithms = poly(n) depthCan prove lower bounds for depth << log(n)depth

12. Lower bounds for AND-OR-NOT circuitsParity(x1,…,xn) = sum of bits modulo 2Computed by small AND-OR-NOT circuits of depth log(n)Can the depth be reduced, while maintaining small size?[Ajtai’83, Furst-Saxe-Sipser’84]: No. small (sub-exponential) AND-OR-NOT circuits of depth <<log(n) cannot compute parity[Yao’85, Hastad’86]: not even approximately

13. Lower bounds for AND-OR-NOT circuitsMain idea: random restrictions of input set most inputs bits to random 0,1 values; leave remaining variables “alive”Simple computations: AND, OR, NOTGates with many inputs are fixed by random restrictionIterate to make entire circuit simple (decision tree)Parity doesn’t simplify (becomes parity of fewer inputs)X1ANDXn…

14. Lower bounds for AND-OR-NOT-PARITY circuitsWhat if we also allow parity gates as simple computations?MOD3(x1,…,xn) = sum of bits modulo 3Intuition: parities shouldn’t help compute MOD3[Razborov’87, Smolensky’87]: small (sub-exponential) AND-OR-NOT-PARITY circuits of depth <<log(n) cannot compute MOD3

15. Lower bounds for AND-OR-NOT-PARITY circuitsLocal computation: AND, OR, NOT, PARITYRandom restrictions fail: don’t simplify parityCan approximate local computations by low-degree polynomials modulo 2 (and by composition, approximate the entire circuit)Low degree polynomials modulo 2 cannot compute MOD3

16. Lower bounds for AND-OR-NOT-PARITY-MOD3 circuitsWhat if we allow both PARITY and MOD3 gates as simple computation?Conjecture: cannot compute MOD5 in small size and depth <<log(n)[Williams’10]: cannot compute all NEXP - exponential analog of NP (problems whose solution can be verified in exponential time)