PPT-Thwarting cache-based side-channel attacks
Author : myesha-ticknor | Published Date : 2017-06-26
Yuval Yarom The University of Adelaide and Data61 The binary search needs to be done in constant time to avoid timing issue But its fast so theres no problem
Presentation Embed Code
Download Presentation
Download Presentation The PPT/PDF document "Thwarting cache-based side-channel attac..." is the property of its rightful owner. Permission is granted to download and print the materials on this website for personal, non-commercial use only, and to display it on your personal computer provided you do not modify the materials and that you retain all copyright notices contained in the materials. By downloading content from our website, you accept the terms of this agreement.
Thwarting cache-based side-channel attacks: Transcript
Yuval Yarom The University of Adelaide and Data61 The binary search needs to be done in constant time to avoid timing issue But its fast so theres no problem An anonymous reviewer . Client sends HTTP request 2 Web Cache responds immediately if cached object is available 3 If object is not in cache W eb Cache requests object from Application Server 4 Application Server generates response may include Database queries 5 Applicatio Message Passing Sharedmemory single copy of shared data in memory threads communicate by readingwriting to a shared location Messagepassing each thread has a copy of data in its own private memory that other threads cannot access threads communicate Yinqian. Zhang (UNC-Chapel Hill). Ari . Juels. (RSA Labs) . Michael K. Reiter (UNC-Chapel Hill). Thomas . Ristenpart. (U Wisconsin-Madison). Motivation. Security Isolation by Virtualization. Virtualization Layer . OpenSSL. ECDSA. Naomi . Benger. . Joop. van de Pol Nigel Smart . Yuval Yarom. 1. Outline. Background. ECDSA. wNAF. scalar multiplication. Hidden Number Problem. The . Flush+Reload. . Technique. Stealing the Pie Without Touching the Sill. Background. XSS recently replaced SQL injection and . related server-side . injection attacks as the number one . threat in . the OWASP . (Open Web Application Security Project) ranking.. Stefan . Podlipnig. , Laszlo . Boszormenyl. University Klagenfurt. ACM Computing Surveys, December 2003. Presenter: . Junghwan. Song. 2012.04.25. Outline. Introduction. Classification. Recency. -based. virtual machines in . cloud environment. Rohit . Kugaonkar. CMSC 601 Spring 2011. May 9. th. 2011. http://res.sys-con.com/story/dec09/1225058/Cloud%20security%20226.jpg. Cloud Computing. “Cloud computing is a model for enabling ubiquitous, convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, servers, storage, applications, and services) that can be rapidly provisioned and released with minimal management effort or service provider interaction”.. a. rchitectural. Side-Channel Attacks. Part 2. Yuval Yarom. The University of Adelaide . and . Data61. 1. X86 L1 Cache. Tag. Set. Offset. 0. 6 5. 12 11. Tag,. Data. Sets. Ways. Stores fixed-size (64B) . Abstract. This paper proposes distributed cache invalidation mechanism (DCIM), a client-based cache consistency scheme that is implemented on top of a previously proposed architecture for caching data items in mobile ad hoc networks (MANETs), namely COACS, where special nodes cache the queries and the addresses of the nodes that store the responses to these queries. . Direct-mapped caches. Set-associative caches. Impact of caches on performance. CS 105. Tour of the Black Holes of Computing. Cache Memories. C. ache memories . are small, fast SRAM-based memories managed automatically in hardware. on . Last-Level . Cache. Mehmet . Kayaalp, IBM Research. Nael. . Abu-. Ghazaleh. , University . of California Riverside. Dmitry . Ponomarev. , State . University of New York at Binghamton. Aamer. . Junghyun Jun. 1. ,. . Solchan. . Yeon. 2. , . Titir. . Kundu. 3. , . Dharma P . Agrawal. 3. , . Jaehoon . (Paul) Jeong. 4. . 1. Indian Institute of Technology . Ropar. , . 2. Kookmin . University, Republic of . TLC: A Tag-less Cache for reducing dynamic first level Cache Energy Presented by Rohit Reddy Takkala Introduction First level caches are performance critical and are therefore optimized for speed. Modern processors reduce the miss ratio by using set-associative caches and optimize latency by reading all ways in parallel with the TLB(Translation Lookaside Buffer) and tag lookup. TrustZone. Defense on ARM Platform. Naiwei Liu, . Wanyu. . zang. , Meng . yu. , Ravi . SANdhu. UTSA ICS lab; Roosevelt university. Contents. Abstract and Introduction. Related Work. Cache-Based Security Threats and Attack.
Download Document
Here is the link to download the presentation.
"Thwarting cache-based side-channel attacks"The content belongs to its owner. You may download and print it for personal use, without modification, and keep all copyright notices. By downloading, you agree to these terms.
Related Documents