HVS’ Perspective on Removing Grid Wires - PowerPoint Presentation

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HVS’ Perspective on Removing Grid Wires

Bo Yu

May 16, 2019

The Impact on CE From HVS if G Wires Are Removed

Increased sensitivity to HVPS ripples during normal operation

Increased risk of FEE damage due to charge injection during a HV discharge on the HVS

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The Shielding Power of the Grid Plane

The shielding factor of the grid plane can be estimated by calculating the capacitance ratio between a distance object in front of the APA to a G wire vs. a U wire.

A 2D FEA of the DUNE wire cell geometry shows that the shielding factor is about 4.5.

If the G plane is removed, the U wire plane would see increase in capacitive coupling to the CPA/FC by a factor of ~5.

test sample

G

U

VXC5.82E-11-9.28E-13-2.05E-13-4.50E-14-9.44E-15fraction78.15%17.26%3.79%0.79%ratio4.534.564.76

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HVPS Ripples

We used two RC filters in NP04 to attenuate the ripples from the HVPS. Based on the HVPS ripple spec of 10

-5

, we had initially designed the filters with a total resistance of 400M

W

, in order to suppress the base frequency of the ripple @ 100Hz.

The actual filter resistance used in NP04 is a factor of 5 less at 80M

W. We have not seen excess noise from the CE attributed to the HVPS ripples.We have collected data from runs where we sent voltage pulses down the HVFT without filters to better understand the practical limit on the ripple and filter attenuation factors.From the HVPS side, we don’t expect much difficulty to reduce the PS ripple by another factor of 5, if needed.4

Charge Injection from a HV Discharge

In a HV discharge, a low impedance path is developed between the HV components and ground, resulting in a rapid change in voltage on the HV surfaces.

It has long been recognized that a metallic cathode structure could inject a large peak current into the input of the FEE and overwhelm the protection circuits built into the ASIC and the FEMB.

The cathodes of the DUNE SP TPC are designed to be all resistive to delay the overall

dV

/dt in the event of a HV discharge. The resistive cathode has been modeled as an equivalent circuit and the FEE’s response to a short to ground on the edge of the

cathode analyzed by Sergio Rescia.

https://lbne2-docdb.fnal.gov/cgi-bin/private/ShowDocument?docid=10865 The time constant of the resistive cathode is several orders of magnitudegreater than that of a metallic cathode, with commensurate reduction inpeak charge injection. Using this design, we believe that the cathodeno longer poses a risk to the FEE. A factor of 5 increase in coupling by removing the grid wire is perfectly fine, so I thought when I signed on to Xin’s proposal.5

Full HVS Analysis

In the meantime, Sergio has started his full system analysis (instead of just the cathode). At this moment, the model is a mostly 2D geometry, appropriate for the middle major portion of the TPC.

All partial capacitances between cathode segments, field cage profiles, and APAs are included. The termination of grid wires, readout of U wires are also included.

Early results seem to show that with the cathode being full resistive, the dominant source of charge injection comes from the field cage.

Even though the field cage profiles are connected with high resistance, in a HV discharge, the varistors become conductive and can swing the potential on a large section of the field cage quickly.

The early numbers show that with the G plane in place, the charge injection to the FEE is modest, but we may not have huge safety margins without the G wires.

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ICEBERG

ICEBERG suffered through a series of HV instabilities during the first run, and ended up with a large number of CE channels damaged/misbehaving.

Shanshan Gao (BNL) was able to duplicate some of the failure mode by injecting charge pulses into the inputs of the ASICs using this circuit.

He found that above 100V at the HV in, the ASIC channel becomes unresponsive warm, but working in LN

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. Beyond 150V input, the channel is dead warm or cold.

The same “zapper” was used to test the FEMB protection diodes, which were found to survive 1kV pulses.

This gives us a good upper limit on the charge injection the FEMB can tolerate for the full HVS circuit analysis. To ASIC input7

Summary

Removing the grid wire will increase the coupling of the HVS to U readout channels by about a factor of 5.

HVS may need to increase attenuation factor in the HVPS ripple filters by a factor of 5. This is not difficult to implement.

New full HVS circuit analysis indicates that the coupling/charge injection from the field cage to the U readout is not negligible.

We have to wait for a few weeks for the completion of the study to give a firmer answer about the risk from the HVS to CE.

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