HCal Electronics with First-level - PowerPoint Presentation

Slide1

HCal Electronics with First-level ECal trig

B. QuinnJuly 14, 2017

1

GEp trigger (or possible HCal trigger)HCal

is 12X24 array of modules.Form overlapping regions by taking

all possible 2X2 sets of (4X4 module)

groups

. Each group is a member of fourregions (or less).Total of 10 regions to be summed to givetotal energy in region. Each sum can be compared to threshold. Ten logic signals to send to ECal to look forenergy in region of HCal expected to correspond to ECal hit.

2

3

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2

1

2

2

2

2

2

2

2

4

4

4

4

2

1

1

2

For

GEp

trigger

18 (4X4 module) groups require:

18 (16+

chan

) summing modules

Have

17

UVa

120s (more available?)

(Could turn some modules into 2X18

chan

sums with fairly simple mod.)

17 modified and tested (2 repaired)

14 linear

fan-out channels (4 modules)

10 fan-in

chanels

(3 modules)

Have

2

UVa

quad 133s (more

available?)

(Built-in disc. BUT 100 ns delay !!

and ECL out)

4Sum X -0.393Sum X -0.697 X 2

integral/4.7 nsdecay time=230 ns

X -1

6.5 ohm

Cabling scheme for HCalOne signal, one HV cable to each tube. (Plus one HV & 3 signal/section for pulser)Cables secured, strain-relieved on gantry behind HCal

.Cables held in place by gantry so they can be quickly re-connected to correct tubes.On

HCal

electronics/cabling platform

X10 amp Outputs to electronics hut (BNC RG58 100 m. long) Lemo cable outputs to UVa summing moduleSecond patch panel in electronics hut Asymmetric passive splitter (board with connection/housing/power for Nino) Signal cables run to one of eighteen 16-input BNC sub-panels (S01-S18)

Sequential inputs go to sequential channels of Nino, fADC

Nino outputs go to VETROC-based TDC or F1 TDC

PMT

fADC

Nino

Disc.

VETROC(or TDC)

Sum of 4

Disc

Shielded DAQ hut

Sum of 16

(18 groups)

(10 regions)

18

UVa

Summing mod.

36 in -> 18 in (16

in used

)

4 quad linear FO (e.g. Phillips 740 2.5V)

3 quad 4-fold linear FI (

UVa

133)

12

chan

L.E. Disc.(3X4 or 1X16)

Passive

asymmetric

splitter

LVDS

To

Ecal

trigger

Lemo

fan

out

100 m ??

or nearby hut

X10 amp

patch panel

P

lan

for LED pulsing.

Don’t worry about firing adjacent

PMTs simultaneously but avoid having

adjacent electronics channels for same

LED pulse.

Simple cabling pattern.Adjacent electronics channels don’t fireon same LED pulse and unlikely to fire in same cluster.Electronics module problems show up as many bad HCal signals in two rows,

easy to spot.

Somewhat easier to track down single-

module problems.

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15

16

1-12Cabling pattern.Three 16-channel slotsfor each four rows.Only one patch panel straddles each

of two sub-module divisions (S05 and S14)

12

8 4 16

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12

b3

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1

2

3

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15

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1-1

24-1

24-12

{

S16

S17

S18

S01

S02

S03

S04

S05

S06

{

{

{

{

{

S07

S08

S09

S10

S11

S12

S13

S14

S15

10Map from electronicschannels to HCal module-Amplifiers-Patch panels-Ninos

-TDCs (or VETROCs)-fADCs

S01 S02 S03 S04 S05 S06 S07 S08 S09

1 1- 1 2- 2 3- 3 5- 1 6- 2 7- 3 9- 1 10- 2 11- 3

2 1- 4 2- 5 3- 6 5- 4 6- 5 7- 6 9- 4 10- 5 11- 6 3 1- 7 2- 8 3- 9 5- 7 6- 8 7- 9 9- 7 10- 8 11- 9 4 1-10 2-11 3-12 5-10 6-11 7-12 9-10 10-11 11-12 5 1- 2 2- 3 4- 1 5- 2 6- 3 8- 1 9- 2 10- 3 12- 1 6 1- 5 2- 6 4- 4 5- 5 6- 6 8- 4 9- 5 10- 6 12- 4 7 1- 8 2- 9 4- 7 5- 8 6- 9 8- 7 9- 8 10- 9 12- 7 8 1-11 2-12 4-10 5-11 6-12 8-10 9-11 10-12 12-10 9 1- 3 3- 1 4- 2 5- 3 7- 1 8- 2 9- 3 11- 1 12- 210 1- 6 3- 4 4- 5 5- 6 7- 4 8- 5 9- 6 11- 4 12- 511 1- 9 3- 7 4- 8 5- 9 7- 7 8- 8 9- 9 11- 7 12- 812 1-12 3-10 4-11 5-12 7-10 8-11 9-12 11-10 12-1113 2- 1 3- 2 4- 3 6- 1 7- 2 8- 3 10- 1 11- 2 12- 314 2- 4 3- 5 4- 6 6- 4 7- 5 8- 6 10- 4 11- 5 12- 615 2- 7 3- 8 4- 9 6- 7 7- 8 8- 9 10- 7 11- 8 12- 9

16 2-10 3-11 4-12 6-10 7-11 8-12 10-10 11-11 12-12 S10 S11 S12 S13 S14 S15 S16 S17 S18

1 13- 1 14- 2 15- 3 17- 1 18- 2 19- 3 21- 1 22- 2 23- 3 2 13- 4 14- 5 15- 6 17- 4 18- 5 19- 6 21- 4 22- 5 23- 6

3 13- 7 14- 8 15- 9 17- 7 18- 8 19- 9 21- 7 22- 8 23- 9 4 13-10 14-11 15-12 17-10 18-11 19-12 21-10 22-11 23-12 5 13- 2 14- 3 16- 1 17- 2 18- 3 20- 1 21- 2 22- 3 24- 1

6 13- 5 14- 6 16- 4 17- 5 18- 6 20- 4 21- 5 22- 6 24- 4 7 13- 8 14- 9 16- 7 17- 8 18- 9 20- 7 21- 8 22- 9 24- 7 8 13-11 14-12 16-10 17-11 18-12 20-10 21-11 22-12 24-10

9 13- 3 15- 1 16- 2 17- 3 19- 1 20- 2 21- 3 23- 1 24- 210 13- 6 15- 4 16- 5 17- 6 19- 4 20- 5 21- 6 23- 4 24- 5

11 13- 9 15- 7 16- 8 17- 9 19- 7 20- 8 21- 9 23- 7 24- 812 13-12 15-10 16-11 17-12 19-10 20-11 21-12 23-10 24-1113 14- 1 15- 2 16- 3 18- 1 19- 2 20- 3 22- 1 23- 2 24- 3

14 14- 4 15- 5 16- 6 18- 4 19- 5 20- 6 22- 4 23- 5 24- 615 14- 7 15- 8 16- 9 18- 7 19- 8 20- 9 22- 7 23- 8 24- 916 14-10 15-11 16-12 18-10 19-11 20-12 22-10 23-11 24-12

144 BNC/

lemo

cables from

top half of

HCal(~5m long)

11

9 16-chan

PMT amps

9 16-chan

PMT amps

144 BNC/

lemo

cables from

bottom half of

HCal

(~5m long)

9X16-chan

BNC/BNC

patch panel

(To electronics

hut)

9X16-chan

BNC/BNC

patch panel

(To electronics

hut)

144

lemo

cables

144

lemo

cables

G

r

1

G

r

9

}

}

}

S01

S02

S03

S04

S05

S06

S07

S08

S09

144

lemo

cables

144

lemo

cables

G

r

10

G

r

18

9

lemo

cables

9

lemo

cables

9 16-chan

summing

UVa

120

9 16-chan

summing

UVa

120

4 lin.

Fan-

out

3X4-

chan

sum

UVa

-

133

Electronics racks on

HCal

gantry (2 relay racks)

(

HV patches and cables not shown)

10

ch

LE-

disc

S01

S01

S09

S09

S10

S16

S16

S10

12

9X16-chanpatch panel/

Nino interface

(BNC from

gantry)S01S099X16-chanpatch panel/Nino interface

(BNC from gantry)

S10

S16

VETROC

or

F1 TDC

S01

S09

S16

S10

VETROC

or

F1 TDC

F250

fADCs

S01

S09

S16

S10

Electronics racks

in shielded hut

(2 relay racks)

LVDS

(converted

to ECL

for F1?)

Lemo

F250

fADCs

13Considering possible routes for cables (assuming no local hut)

14Time (ns) (from impact with front face) ~ 0.2 V signal amplitude

=> ~3.0 nVs => 60 pC

into X10 amp

after amplifier (3V max)

~2 V amplitude 30 nVs

15Choose PMT gain so expected signal sums to ~60 nVs after amp giving ~1V output. Discriminate at eg. ~0.25 V.

Summer output vs. pulse integral

16~240 mV

~4400

p.e

Expect 6200-7200

p,ePMT @ 1325 VLow Q.E. ?? Need more testing

17

{

Zeners

on last 3 stages

total 500 V{@ 1325 Vonly 185 V K-D1probably need a Zener(“Easy” fix on 200 CMU XP 2262 bases…~100

JLab

XP 2282 bases are SMDbut lower-gain 8 stage?

)

18~2.1 V

After X10 PMT amp

~3000

p.e

!!! wrong!

19After X10 PMT ampand 100 m RG58 cable~720 mV

20For all experiments:288 ~5m BNC/lemo cables24 12-chan amps &2 NIM bins288 lemo

/BNC jumper cables288 chan BNC-BNC patch panel

288

long BNC

RG 58 cables (from ECal)3 long cables +1 SHV for pulserAsymmetric splitter panel in Electronics hut with connection/housing for Nino cards18 Nino cards (with pin connectors)18 sixteen channel LVDS cables18 VETROCs (or F1 TDCs)288 lemo cables18 fADCs4

VXI crates 4

ROCs & TIs

288 chan HV (2 1458 crates 24 1461N)

12 24-conductor HV cables24 24-chan. SHV boxes288 1.5 m SHV

288 5 m SHV

For GEp:

288+ lemo cables

18 UVa 120 Summing modules (modified)

4 quad linear FI/FO (e.g. Phillips 740 2.5V)3 UVa 133 quad 4-chan summing modules

12 channels L.E. Disc.3 NIM bins

}

Acquisition

in

done?

21Remaining tests:(This summer)Double-check QE at low HVCompare with Zener on K-D1

Test XP 2282 at low gain for QE dropTest timing with Nino boards with/without 100 m cables

Require voltage-divider boards to give mV signals

with isolation capacitors! Also test with cosmics (less smooth signal)Make final decision on use of Nino boardsDecide whether 100 m cables OK …if so, decide cable route (and rack positions in hut)

22