local Allegro field applications engineer or sales representative.Alle - PDF document

local Allegro field applications engineer or sales representative.Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no respon-sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.cations, contact Allegro Sales.Deadline for receipt of LAST TIME BUY orders: April 30, 2011LAST TIME BUY. This classification indicates that the product is restricted to existing customer applications. The device should not be Last Time Buy The A6276 is specifically designed for LED-display shift register, accompanying data latches, and 16 NPN constant-with microprocessor-based systems. With a 5 V logic supply, typical serial data-input rates are up to 20 MHz. The LED drive current is de ter mined by the user selection of a single resistor. A CMOS serial data output permits cascaded connections in applications requiring additional drive lines. For inter-digit input high. Similar 8-bit devices are available as the A6275.Two package styles are provided: through-hole DIP (suffix A) and surface-mount SOIC (suffix LW). In normal applications, DIP allow it to sink maximum rated current through all outputs con tin u ous ly over the operating temperature range (90 mA, 0.75 V drop, 85°C). Both packages are lead (Pb) free, with Up to 90 mA constant-current outputs Undervoltage lockout Low-power CMOS logic and latches High data input rate Functional replacement for TB62706BN/BF(A package)(LW package) 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com Part NumberPackagePackingTemperature (°C)A6276EA-T24-pin DIP15 per tube–40 to 85A6276ELWTR-T24-pin SOICW1000 per reel–40 to 85 CharacteristicSymbolNotesRatingUnitsSupply Voltage V7.0VOutput VoltageV–0.5 to 17VInput VoltageV + 0.4VOutput CurrentI90mAGround CurrentI1475mAOperating Ambient TemperatureTRange E–40 to 85ºCMaximum Junction TemperatureT(max)150ºCStorage TemperatureT–55 to 150ºC*Caution: These CMOS devices have input static protection (Class 2) but are still sus CharacteristicSymbolTest Conditions*ValueUnitsPackage Thermal ResistancePackage A, 1-layer PCB based on JEDEC standard50ºC/WPackage LW, 1-layer PCB based on JEDEC standard85ºC/W*Additional thermal information available on the Allegro website 75100125150AMBIENT TEMPERATURE IN ° 24-PIN DIP, RJA = 50°C/W 24-LEAD SOIC, RJA = 85°C/W *Mounted on single-layer, two-sided PCB, with 3.8 in2 copper each side; additional information on Allegro Web site 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com Copyright © 2000, 2003 Allegro MicroSystems, Inc. Terminal Description Terminal No. Terminal Name Function 1 GND Reference terminal for control logic. 2 SERIAL DATA IN Serial-data input to the shift-register. 3 CLOCK Clock input terminal for data shift on rising edge. 4 LATCH ENABLE Data strobe input terminal; serial data is latched with high-level input. 5-20 OUT The 16 current-sinking output ter 21 OUTPUT ENABLE When (active) low, the output drivers are enabled; when high, all output 22 SERIAL DATA OUT CMOS serial-data output to the following shift-register. 23 R An external resistor at this terminal establishes the output current for all 24 SUPPLY (V) The logic supply voltage (typically 5 V). LATCHES DATA OUTLOGICSUPPLYDATA INLATCHCLOCKCK EXT REGULATOR 91011 141516817 (A and LW packages) 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com CLOCK and SERIAL DATA INSERIAL DATA OUTLATCH ENABLEOUTPUT ENABLE (active low) Dwg. EP-010-11IN VDD Dwg. EP-010-12IN VDD Dwg. EP-010-13IN VDD TRUTH TABLESerial Shift Register Contents Serial Latch Latch Contents Output Output Con Data Clock Data Enable EnableInput Input I ... I Output Input I ... I Input I ... I IH H R R ... RL L R R ... R RX R R R ... R R R X X X ... X X X L R R R ... R P P ... P P H P P P ... P L P ... P X X X ... X X H H H H ... H HL = Low Logic (Voltage) Level H = High Logic (Voltage) Level X = Irrelevant P = Present State R = Previous State VDD Dwg. EP-063-6 OUT 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com ELECTRICAL CHARACTERISTICS at T Characteristic Symbol Test Conditions Min. Typ. Max. Unit Supply Voltage Range V Operating 4.5 5.0 5.5 V Under-Voltage Lockout V = 0 5 V 3.4 – 4.0 V Output Current I = 0.7 V, R 64.2 75.5 86.8 mA V = 0.7 V, R 34.1 40.0 45.9 mA Output Current Matching 0.4 V V 0.7 V: (difference between any R – ±1.5 ±6.0 % R – ±1.5 ±6.0 % Output Leakage Current I = 15 V – 1.0 5.0 Logic Input Voltage V 0.7V – V V GND – 0.3V SERIAL DATA OUT VA – – 0.4 VVoltageA 4.6 – – V Input Resistance R ENABLE Input, Pull Up 150 300 600 k LATCH Input, Pull Down 100 200 400 k Supply Current I = 5 V – 0.8 1.4 mA R = 5 V 3.5 6.0 8.0 mA R = 5 V 6.5 11 15 mA I = 0 V 7.0 13 20 mA R = 0 V 10 22 32 mA Typical Data is at V = 5 V and is for design information only. 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com = 5 V, V = 0.4 V, V = 0 V, = 3 V, R = 10.5 pF.Characteristic Symbol Test Conditions Min. Typ. Max. Unit Propagation Delay Time t CLOCK-OUT – 350 1000 ns LATCH-OUT – 350 1000 ns ENABLE-OUT – 350 1000 ns CLOCK-SERIAL DATA OUT – 40 – ns Propagation Delay Time t CLOCK-OUT – 300 1000 ns LATCH-OUT – 300 1000 ns ENABLE-OUT – 300 1000 ns CLOCK-SERIAL DATA OUT – 40 – ns Output Fall Time t 90% to 10% voltage 150 350 1000 ns Output Rise Time t 10% to 90% voltage 150 300 600 ns RECOMMENDED OPERATING CONDITIONSCharacteristic Symbol Conditions Min. Typ. Max. Unit Supply Voltage V 4.5 5.0 5.5 V Output Voltage V – 1.0 4.0 V Output Current I Continuous, any one output – – 90 mA I SERIAL DATA OUT – – -1.0 mA I SERIAL DATA OUT – – 1.0 mA Logic Input Voltage V 0.7V – V + 0.3 V V -0.3 – 0.3V Clock Frequency f Cascade operation – – 10 MHz 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com TIMING REQUIREMENTS and SPECIFICATIONSformation towards the SERIAL DATA OUTPUT. The serial data respective latch when the LATCH ENABLE is high (serial-to-par al lel con ver sion). The latches continue to accept new data as long as the LATCH ENABLE is held high. Ap pli ca tions where the latches are bypassed (LATCH ENABLE tied high) will require that the OUTPUT EN ABLE input be high during serial data entry.When the OUTPUT ENABLE input is high, the output sink driv ers are disabled (OFF). The in for ma tion stored in the latches is not affected by the OUTPUT ENABLE input. With the OUT-PUT ENABLE input low, the outputs are con trolled by the state of their re spec tive latches.Data Active Time Before Clock Pulse (Data Set-Up Time), t ............................. Data Active Time After Clock Pulse (Data Hold Time), t ................................. Clock Pulse Width, t .................................. Time Between Clock Ac ti va tion and Latch Enable, t ............................... Latch Enable Pulse Width, t ......................F. Output Enable Pulse Width, t ...................NOTE: Timing is representative of a 10 MHz clock. Sig- nif i cant ly higher speeds are attainable.Max. Clock Transition Time, t ....................... DATA INLATCHENABLEDwg. WP-029-1 50%DATA OUT DATA50% LOW = ALL OUTPUTS ENABLED p LOW = OUTPUT ON OUTPUTDwg. WP-030-1A DATA50% HIGH = ALL OUTPUTS DISABLED (BLANKED) ft t 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com ALLOWABLE OUTPUT CURRENT AS A FUNCTION OF DUTY CYCLE = 1 V V = 2 V V = 3 V V = 4 V80 A = +25CV = 5 VR = 50 DUTY CYCLE IN PER CENT100 Dwg. GP-062-10ALLOWABLE OUTPUT CURRENT IN mA/BIT604020406010080 = 1 V V = 2 V TA = +50CV = 5 VR = 50 = 3 V V = 4 V80 DUTY CYCLE IN PER CENT100 Dwg. GP-062-6ALLOWABLE OUTPUT CURRENT IN mA/BIT6040406080 = 1 V V = 2 V V = 3 V80 = 4 V TA = +25CV = 5 VR = 75 = 0.7 V 0DUTY CYCLE IN PER CENT100 Dwg. GP-062-7604020406010080 = 1 V V = 2 V V = 3 V80 A = +50CV = 5 VR = 75 = 0.7 V V = 4 V 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com DUTY CYCLE IN PER CENT100 Dwg. GP-062-96040204010080 = 1 V V = 2 V TA = +85CV = 5 VR = 50 = 3 V V = 0.7 V V = 4 V80 LE6726AAE6726ATYPICAL CHARACTERISTICS 0.5Dwg. GP-0631.02.01.5 IN VOLTS 0 40OUTPUT CURRENT IN mA/BIT20 A = +25CR = 500 DUTY CYCLE IN PER CENT100 Dwg. GP-062-8ALLOWABLE OUTPUT CURRENT IN mA/BIT604020406010080 = 1 V V = 2 V V = 3 V80 A = +85CV = 5 VR = 75 = 4 V V = 0.4 V 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com ) is set by the external re sis tor ) as shown in the figure below. 3005007001 k 5 k 2003 k 20406080 VCE = 0.7 V low able package power dissipation is determined as (max) = (150 - TWhen the load supply voltage is greater than 3 V to 5 V, Load Supply Voltage (V signed to operate with driver voltage drops (V0.4 V to 0.7 V with LED forward voltages (V) of 1.2 V to 4.0 V. If higher voltages are dropped across the driver, package power dissipation will be increased significantly. To minimize package power dissipation, it is rec om -mend ed to use the lowest possible load supply voltage or = V - V - VDROP for a single driver, or a Zener 0.7 V per diode) for a group of drivers. If the available pro vide supply voltages as low as 3.3 V. White 3.5 – 4.0 VBlue 3.0 – 4.0 VGreen 1.8 – 2.2 VYellow 2.0 – 2.1 VAmber 1.9 – 2.65 VRed 1.6 – 2.25 VInfrared 1.2 – 1.5 Vand power-ground terminal. If ground pattern layout con tains large common-mode resistance, and the voltage between the system ground and the LATCH ENABLE or CLOCK terminals ex ceeds 2.5 V (because of switching noise), these devices may not operate correctly. Dwg. EP-064 VLED VDROPVFVCE 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com Package A, 24-pin DIP Dimensions exclusive of mold flash, gate burrs, and dambar protrusionsExact case and lead configuration at supplier discretion within limits shown Terminal #1 mark area (reference JEDEC MS-001 BE)Dimensions in millimeters 0.46 ±0.121.27 MIN6.35+0.76–0.253.30+0.51–0.3810.92+0.38–0.2530.10+0.25–0.641.52+0.25–0.380.38+0.10–0.05 7.62 2.54 Package LW, 24-pin SOICW Reference pad layout (reference IPC SOIC127P1030X265-24M)All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary B0.20 ±0.10 0.41 ±0.10 0.659.60 1.27 1 15.40±0.20 2.65 MAX 10.30±0.33 7.50±0.10 SEATING (Reference JEDEC MS-013 AD) Terminal #1 mark area SEATING PLANE PCB Layout Reference View 4° ±40.27+0.07–0.060.84+0.44–0.431 16-Bit Serial Input, Constant-CurrentLatched LED DriverA6276 Allegro MicroSystems, Inc.115 Northeast CutoffWorcester, Massachusetts 01615-0036 U.S.A.1.508.853.5000; www.allegromicro.com Copyright ©2000-2009, Allegro MicroSystems, Inc.Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be failure of that life support device or system, or to affect the safety or effectiveness of that device or system.The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. www.allegromicro.com