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CSE 140: Components and Design Techniques for Digital Systems CSE 140: Components and Design Techniques for Digital Systems

CSE 140: Components and Design Techniques for Digital Systems - PowerPoint Presentation

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CSE 140: Components and Design Techniques for Digital Systems - PPT Presentation

Lecture 9 Sequential Networks Implementation CK Cheng Dept of Computer Science and Engineering University of California San Diego 1 Implementation Format and Tool Mealy amp Moore Machines Excitation Table ID: 631671

excitation table flip state table excitation state flip implementation implement tables free flop flops counter clk running bit moore

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Slide1

CSE 140: Components and Design Techniques for Digital SystemsLecture 9: Sequential Networks: ImplementationCK ChengDept. of Computer Science and EngineeringUniversity of California, San Diego

1Slide2

ImplementationFormat and ToolMealy & Moore Machines, Excitation TableProcedureState Table to Logic Diagram

Excitation Tables

FFs

Examples

2Slide3

3

Mealy Machine: y

i

(t) = f

i

(X(t), S(t))

Moore Machine: yi(t) = fi(S(t)) si(t+1) = gi(X(t), S(t))

C1

C2

CLK

x(t)

y(t)

Mealy Machine

C1

C2

CLK

x(t)

y(t)

Moore Machine

S(t)

S(t)

Canonical Form: Mealy and Moore MachinesSlide4

iClicker

4

D

y

CLK

x

Q

In the logic diagram below, a D flip-flop has input x and output y.

A: x= Q(t), y=Q(t)

B: x=Q(t+1), y=Q(t)

C: x=Q(t), y=Q(t+1)

D: None of the aboveSlide5

Understanding Current State and Next State in a sequential circuit

5

today

sunrise

“Yesterday is gone. Tomorrow has not yet come. We have only today. Let us begin.”

Mother TeresaSlide6

C1

C2

CLK

x(t)

y(t)

Implementation Format

Q(t)

Q(t+1) =

g(x(t

), Q(t))

Circuit C1

y(t) = f(x(t), Q(t))

Circuit C2

6

Canonical Form: Mealy & Moore machines

State Table

 Netlist

Tool: Excitation TableSlide7

Implementation Tool: Excitation Table

7

x(t)

Q(t)

CLK

C1

id

x(t)

Q(t)

Q(t+1)

0

0

0

1

1

1

1

0

2

0

0

1

3

1

1

0

State Table

Find D, T, (S R), (J K) to drive F-Fs

Example:Slide8

Implementation Tool: Excitation Table

8

x(t)

Q(t)

CLK

Q(t)

C1

id

x(t)

Q(t)

T(t)

Q(t+1)

0

0

0

1

1

1

1

1

1

0

2

0

1

0

1

3

1

1

1

0

id

x(t)

Q(t)

Q(t+1)

0

0

0

1

1

1

1

0

2

0

1

1

3

1

1

0

State Table

Excitation Table

Example with T flip flop

T(t)

Example

:Slide9

Implementation Tool: Excitation Table

9

x(t)

Q(t)

CLK

Q(t)

C1

id

x(t)

Q(t)

T(t)

Q(t+1)

0

0

0

1

1

1

1

1

1

0

2

0

1

0

1

3

1

1

1

0

Excitation Table

Implement combinational logic

C1

D(t), T(t), (S(t) R(t)), (J(t) K(t)) are functions of (x,Q(t))

Example:Slide10

Implementation: ProcedureState Table => Excitation Table

Problem: To implement C1, we need

D(t

), T(t), (S(t) R(t)), (J(t) K(t)) as functions of

(

x,Q(t

)).1. From state table, we have NS: Q(t+1) = g(x(t),Q(t))2. Excitation Table of F-Fs: The setting of D(t), T(t), (S(t) R(t)), (J(t) K(t)) to drive Q(t) to Q(t+1).3. Combining 1 and 2, we have excitation table of C1: D(t), T(t), (S(t) R(t)), (J(t) K(t)) = h(x,Q(t)).

10Slide11

Implementation: ProcedureF-F State Table <=> F-F Excitation Table

11

DTSRJK

PS

Q(t)

NS

Q(t+1)

NS

Q(t+1)

PS

Q(t)

DTSRJK

D F-F

D

(t)= e

D

(Q(t+1), Q(t))

T F-F

T

(t)= e

T

(Q(t+1), Q(t)) SR F-FS(t)= eS(Q(t+1), Q(t))R(t)= eR(Q(t+1), Q(t)) JK F-FJ(t)= eJ(Q(t+1), Q(t)) K(t)= eK(Q(t+1), Q(t)) Slide12

State table of JK F-F:

00

0

1

01

0

0

10

1

1

11

1

0

01

Q(t)

Q(t+1)

JK

Excitation table of JK F-F:

0

0-

-1

1

1-

-0

0

1

PS

NS

Q(t)

Q(t+1)

JK

Ex: If

Q(t) is 1, and Q(t+1) is 0, then JK needs to be -1.

Excitation Table

12Slide13

Excitation Tables and State Tables

0

0-

XY

1

10

-0

01

PS

NS

Q(t)

Q(t+1)

SR

Excitation Tables:

SR

00

0

1

01

0

0

0

1

PS

SR

Q(t)

Q(t+1)

10

1

1

11

-

-

State Tables:

13

0

0-

-1

1

1-

-0

0

1

PS

NS

Q(t)

Q(t+1)

JK

01

0

0

00

0

1

10

1

1

11

1

0

0

1

Q(t)

Q(t+1)

JK

iClicker

XY= -1

XY= 01

XY= 10

XY= 1-

None of the aboveSlide14

Excitation Tables:

0

0

0

1

1

1

0

1

PS

NS

Q(t)

Q(t+1)

D

0

0

0

1

1

1

0

1

PS

D

Q(t)

Q(t+1)

D

State Tables:

Excitation Tables and State Tables

14

0

0

1

1

1

0

0

1

PS

NS

Q(t)

Q(t+1)

T

0

0

1

1

1

0

0

1

PS

T

Q(t)

Q(t+1)

TSlide15

Implementation: ProcedureState table: y(t)= f(Q(t), x(t)), Q(t+1)= g(x(t),Q(t))

Excitation table of F-Fs:

D(t)=

e

D

(Q(t+1), Q(t)); T(t)= eT(Q(t+1), Q(t)); (S, R), or (J, K)From 1 & 2, we derive excitation table of the systemD(t)= hD(x(t),Q(t))= eD

(g(x(t),Q(t)),Q(t)); T(t)= hT(x(t),Q(t))= eT(g(x(t),Q(t)),Q(t));(S, R) or (J, K).Use K-map to derive combinational logic implementation.D(t)= hD(x(t),Q(t)) T(t)= hT(x(t),Q(t))y(t)= f(x(t),Q(t))

15Slide16

Implementation: ExampleImplement a JK F-F with a T F-F

00

0

1

01

0

0

0

1

PS

JK

Q(t)

Q(t+1) = h(J(t),K(t),Q(t)) = J(t)Q’(t)+K’(t)Q(t)

JK

10

1

1

11

1

0

Implement a JK F-F:

Q

Q

C1

J

K

T

16

QSlide17

id

0

1

2

3

4

567J(t)

0 0 0 0 1 1 1 1

K(t)

0 0 1 1 0 0 1 1

Q(t)

0

1 0 1 0 1 0 1

Q(t+1) 0 1 0

0 1 1

1 0

T(t)

0

0

0

1

1

0 1 1

Excitation Table of

T

Flip-Flop

T(t) = Q(t) XOR ( J(t)Q’(t) + K’(t)Q(t))

Excitation Table of the Design

Example: Implement a JK flip-flop using a T flip-flop

17

State table: y(t)= f(Q(t), x(t)), Q(t+1)= g(x(t),Q(t))

Excitation table of F-Fs:

D(t)=

e

D(Q(t+1), Q(t)); T(t)= eT(Q(t+1), Q(t)); (S, R), or (J, K)From 1 & 2, we derive excitation table of the systemD(t)= hD(x(t),Q(t))= eD(g(x(t),Q(t)),Q(t)); T(t)= hT(x(t),Q(t))= eT(g(x(t),Q(t)),Q(t));(S, R) or (J, K).

Use K-map to derive combinational logic implementation.D(t)= h

D(x(t),Q(t)) T(t)= hT(x(t),Q(t))

y(t)= f(x(t),Q(t))

i.e. Q(t+1)(t

) = JQ’(t)+K’Q(t)

0

0

1

1

1

0

01

PS

NS

Q(t)

Q(t+1)Slide18

0 2 6 4

1 3 7 5

Q(t)

J

0 0 1 1

0 1 1 0

K

T(J,K,Q):

T = K(t)Q(t) + J(t)Q’(t)

Q

Q’

J

K

T

Example: Implement a JK flip-flop using a T flip-flop

18Slide19

iClicker

19

Before state assignment,

the relation of its state table and excitation table is

One to one

One to many

Many to oneMany to manyNone of the aboveSlide20

20

Let’s implement our free running 2-bit counter using T-flip flops

S

0

S

1

S

2

S3

PS

Next state

S

1

S2 S3 S0

State Table

S

0

S

1

S

2

S

3Slide21

21

Let’s implement our free running 2-bit counter using T-flip flops

S

0

S

1

S

2

S3

S1 S2 S3 S0

State Table

S

0

S1S2S3

State Table with Assigned

Encoding

0 0

0 1

1 0

1 1

Current

01

10

11

00

NextSlide22

22

Let’s implement our free running 2-bit counter using T-flip flops

id

Q

1

(t)

Q

0

(t)T1(t)

T0(t)Q1(t+1)

Q

0

(t+1)00

0

0

1

1

0

1

1

0

2

1

0

1

1

3

1

1

0

0

Excitation tableSlide23

23

Let’s implement our free running 2-bit counter using T-flip flops

id

Q

1

(t)

Q

0

(t)T1(t)

T0(t)Q1(t+1)

Q

0

(t+1)00

00

1

0

1

1

0

1

1

1

1

0

2

1

0

0

1

1

1

3

1

1

110

0

Excitation tableSlide24

24

Let’s implement our free running 2-bit counter using T-flip flops

id

Q

1

(t)

Q

0

(t)T1(t)

T0(t)Q1(t+1)

Q

0

(t+1)00

00

1

0

1

1

0

1

1

1

1

0

2

1

0

0

1

1

1

3

1

1

11

0

0

Excitation table

T

0

(t) =

T

1

(t) =

Q

0(t+1) = T0(t) Q’0(t)+T’0(t)Q0(t)Q1

(t+1) = T1(t) Q’1(t)+T’1(t)Q1(t)Slide25

25

Let’s implement our free running 2-bit counter using T-flip flops

id

Q

1

(t)

Q

0

(t)T1(t)

T0(t)Q1(t+1)

Q

0

(t+1)00

00

1

0

1

1

0

1

1

1

1

0

2

1

0

0

1

1

1

3

1

1

11

0

0

Excitation table

T

0

(t) = 1

T

1

(t) = Q

0(t)Slide26

26

T

Q

Q’

T

Q

Q’

Q

0

Q

1

1

T

1

Free running counter with T flip flops

T

0

(t) = 1

T

1

(t) = Q

0

(t)Slide27

Summary: Implementation

27

Set up canonical form

Mealy or Moore machine

Identify the next states

state diagram

⇨ state table state assignment

Derive excitation tableInputs of flip flopsDesign the combinational logicdon’t care set utilization