and Yiran Chen Evolutionary Intelligence Lab EILab Electrical and Computer Engineering University of Pittsburgh Embrace the BRAIN Century EDA Challenges in Neuromorphic Computing What is Neuromorphic ID: 602145
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Slide1
Hai Li
and Yiran Chen Evolutionary Intelligence Lab (EI-Lab)Electrical and Computer EngineeringUniversity of Pittsburgh
Embrace the BRAIN Century:
EDA
Challenges in Neuromorphic
ComputingSlide2
What is Neuromorphic
Computing?
An interdisciplinary technology
that was
inspired from biology, physics, mathematics, computer science, and electronic engineering to design artificial neural systems.
(
W
ikipedia
)
It is supposed to fulfill the weakness of von Neumann architecture in processing cognitive applications.
The relevant research has been well funded by all major funding agencies:
And supported in many countries:Slide3
Question I – Understanding?Unfortunately we still do not know much about human brains.The artificial neural network models also evolves over years.
Representation of neuron: 1943, McCulloch (Pitt)The 1st learning rule: 1949, HebbNeuron nets: 1955, Dartmouth Summer Research Project on AISTDP (Spike-timing-dependent plasticity): 1973, TaylorCNN (Convolutional neural networks): 1989, LeCunDo we really need to understand brains before designing a useful N.C. system?No. Many useful systems have been prototyped, e.g., IBM TrueNorth.
The debates on “Emulative vs. Simulative”.Slide4
Question II – Platform?
General Purpose Platform
P. J. Fox,
Tech. Report
, 2013
Graf
et al
,
NIPS
, 2009
Programmable Hardware
Graf
et al
, NIPS, 2009 Misra et al, Neurocomputing, 2010
Application Specific ICMisra et al, Neurocomputing, 2010
Memristor Based Reconfigurable Design
H. Li,
HPEC,
2010 4,
DAC,
2015
Adaptivity
(AD)
Performance
(PE)
Power
Efficiency
(PO)
Programmability
(PR)
Scalability
(SC)Slide5
Question III – Technologies?Are conventional CMOS and EDA technologies capable to support long-term research and development of
N.C. systems? DebatesAnalog or Digital?Spiking-based or level-based?Synchronous or asynchronous?CMOS or Post-Silicon?Other ChallengesProgrammabilityReliabilityScalabilitySecurity
J. Hsu,
IEEE
Spectrum
, 2014
B. Benjamin
,
Neurogrid
,
2014
J.
Gehlhaar, ASPLOS, 2014F. Samarrai, UVAToday
, 2014 S. Miller, ESANN, 2012IBM, TrueNorthSRAM synapse
Digital spike
1M neurons/chip256M synapse/chip
HBP
Analog
VLSI
64
neurons
/chip
1024 synapses/chip
Stanford,
Brain
in Silicon
Mixed-signal VLSI
1M
neurons
/16 chips
1B
synapse/16 chips
Micron,
Automata
Massively parallel
Memory
driven
Non-von Neumann
XML-based language
Qualcomm,
Zeroth
Custom hybrid
Spike neurons on
chip
Synapse off chip
D.B.
Strukov
,
Nature
, 2014
HP,
memristor X-bar
Analog computing
Dense connectionSlide6
AcknowledgementDr. Daniel Hammerstrom, Program manager, DARPADr. Robinson Pino, Program manager, DOEDr.
Dharmendra S. Modha, IBM Fellow and IBM Chief Scientist for Brain-inspired ComputersDr. Mark Barnell, Senior computer scientist and program manager, US AFRLDr. H.-S. Philip Wong, Willard R. and Inez Kerr Bell Professor, Stanford UniversityQ & A?