Codesign of RSA for Optimal Performance vs Flexibility Tradeoff Malik Umar Sharif Rabia Shahid Marcin Rogawski and Kris Gaj George Mason University USA Supported in part by ID: 539672
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Hardware-Software Codesign of RSA for OptimalPerformance vs. Flexibility Trade-off
Malik Umar Sharif, Rabia Shahid, Marcin Rogawski, and Kris GajGeorge Mason UniversityUSA
Supported in part by NIST/U.S. Department of Commerce under Grant No. 60NANB15D058Slide2
Primary Designers & Co-AuthorsRabia Shahid
Malik Umar SharifMarcin RogawskiPhD Students in the Cryptographic Engineering Research Group (CERG) at GMU
Former PhD StudentCadence Design SystemsSan Jose, CASlide3
Cryptography at CrossroadsTraditional CryptographyPost-QuantumCryptographyTransitionPeriodRSAElliptic Curve Cryptosystems(existing standards)Hash-basedCode-basedLattice-basedMultivariate(emerging standards)Attacks usingquantum computersclassical computers Complete collapseTrusted resistanceTrusted resistanceLimited trustSlide4
Solutions for the Transition PeriodTraditional Scheme(e.g., RSA)Post-Quantum Scheme(e.g., NTRU)Maximum flexibility with the choice of parameters and key sizesHardware acceleration crucial because of
high-computational complexitySlide5
Why RSA?The oldest and most trusted public key schemeBaseline for evaluation ofpost-quantum cryptosystemsSimple description: Encryption and decryptionequivalent to modular exponentiation, Y=XE mod NRivestShamirAdlemanMIT, 1977Slide6
Basic Operations of RSAMod ExpMod MulModular Exponentiation: Y = XE mod NModular Multiplication: C = A∙B mod NTypical operand sizes: 512-2048 bitsSlide7
Our Platform – Zynq-7000 & ZedBoardProcessing System (PS) – ARM based Microprocessor SystemSoftware in C based on RELIC (Efficient LIbrary for Cryptography)FreeOptimized for embedded systemsProgrammable Logic (PL) – a 28nm Artix-7-based reconfigurable logic Hardware in VHDL based on architecture by Orup-SuzukiDSP-unit basedOptimized for maximum clock frequencySlide8
Design OptionsMod ExpMod MulMod Exp
Mod MulMod ExpMod MulSoftware in CHardware in VHDLMost FlexibleLeast EfficientMost EfficientLeast FlexibleBest BalancedSlide9
Features of our SolutionMod ExpMod MulThree modular exponentiation schemes: Left-to-Right (L2R), Right-to-Left (R2L)Sliding Window (SLID)selected at run timeFour operand sizes: 512, 1024, 1536, 2048 bits selected at run timeMaximum flexibility and scalabilitySlide10
Speed-up vs. Software Based on RELICSlide11
Future WorkImplementation of selected post-quantum cryptographic algorithmson Zynq using the similar software/hardware co-design approachImplementation of the hardware portions using High-Level Synthesishttp://cryptography.gmu.eduPoster: 3:30-4:15pm