PPT-Accuracy-Configurable Adder for Approximate Arithmetic Desi

Andrew B Kahng Seokhyeong Kang VLSI CAD LABORATORY UC San Diego 49 th Design Automation Conference June 6 th 2012 Outline Background and Motivation Accuracy Configurable Adder Design. Michael . Carbin. with . Sasa. . Misailovic. , Hank Hoffmann. , . Deokhwan. . Kim, . Stelios. . Sidiroglou. , Martin . Rinard. MIT. Challenges for Programming. Expression (specifying approximations). Topics. A 1 bit adder with LED display. Ripple Adder. Signed/Unsigned Subtraction. Hardware Implementation of 4-bit adder. Implementation of a Full Adder.  .  . (carry-in). Verilog Implementation. Use switches to input binary. Adders. 17: Adders. . 2. Outline. Datapath. Computer Arithmetic Principles. Single-bit Addition. Carry-Ripple Adder. Carry-Skip Adder. Carry-Lookahead Adder. Carry-Select Adder. Carry-Increment Adder. Exploring Ontologies. Stamatis Zampetakis, Yannis Tzitzikas,. Asterios Leonidis, and Dimitris Kotzinos. Institute of Computer Science, FORTH-ICS, Greece, . and. Computer Science Department, University of Crete, Greece. Hardware: Challenges and Opportunities. Author. : Bingsheng He. (Nanyang Technological University, Singapore) . Speaker. : . Jiong . He . (Nanyang Technological University, Singapore. ). 1. What is Approximate Hardware?. Michael Carbin. Deokhwan. Kim, . Sasa. . Misailovic. , and Martin C. . Rinard. Approximate Computing. Media Processing, Machine Learning, Search. Solution Space: Accuracy versus Cost. Accuracy. Time/. Decimal Leading-Zero . Anticipator. By . Liang-Kai . Wang and . Michael J. Schulte. Joseph Schneider. March 12, 2010. Goal is to improve latency for DFP Adder. Number of modifications performed to achieve this, such as an implementation of a new internal format. : Language Support for Approximate Hardware Design. DATE 2015. Georgia Institute of Technology. Alternative Computing Technologies (ACT) Lab. Georgia Institute of Technology University of Minnesota UC San Diego. Jungwook Choi and Rob . A. . Rutenbar. Belief . Propagation . FPGA for . Computer Vision. Variety . of pixel-labeling apps in CV are mapped to probabilistic graphical model, effectively solved by . BP. David Wilson, Greg Stitt. ECE Department. University of Florida. Introduction. There are many ways to implement a digital function, but each approach may have different tradeoffs. As a digital designer, you need to consider these tradeoffs when meeting design requirements. Frank Feustel – Director, Product Management, QAD. Building the Effective Enterprise . 2. The following is intended to outline QAD’s general product direction. It is intended for information purposes only, and may not be incorporated into any contract. It is not a commitment to deliver any material, code, functional capabilities, and should not be relied upon in making purchasing decisions. The development, release, and timing of any features or functional capabilities described for QAD’s products remains at the sole discretion of QAD.. Abbas Rahimi, . Andrea . Marongiu. ,. . Rajesh K. Gupta, Luca . Benini. UC San Diego, and . University of Bologna . Micrel.deis.unibo.it. /. MultiTherman. variability.org. Outline. Introduction. and . Sasa . Misailovic. MIT CSAIL. Collaborators. Martin . Rinard. , Michael . Carbin. , . Stelios. . Sidiroglou. , Henry Hoffmann, . Deokhwan. Kim, Fan Long, Daniel Roy, . Zeyuan. Allen Zhu, Michael Kling, . Ulya. . R. . Karpuzcu. ukarpuzc@umn.edu. . 12/01/2015. Outline. Background. Pitfalls & Fallacies. Practical Guidelines. 2. 12/01/2015. On Quantification of Accuracy Loss in Approximate Computing.