Organization and Architecture Integers and Arithmetic Part 3 1 Outline 2s Complement Binary Addition 2s Complement Binary Subtraction Binary Multiplication Unsigned 2s Complement Multiplication ID: 759565
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CS 325: CS Hardware and SoftwareOrganization and Architecture
Integers and ArithmeticPart 3
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Slide2Outline
2’s Complement Binary Addition2’s Complement Binary SubtractionBinary MultiplicationUnsigned2’s Complement MultiplicationBooth’s AlgorithmBinary Division2’s Complement Division
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Slide32’s Complement Binary Addition
-39 + 92 = 53 1 1 1 1 1 1 0 1 1 0 0 1+0 1 0 1 1 1 0 0 0 0 1 1 0 1 0 1Carryout without overflow. Sum is correct.
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Slide42’s Complement Binary Addition
104 + 45 = 149 1 1 1 0 1 1 0 1 0 0 0+0 0 1 0 1 1 0 1 1 0 0 1 0 1 0 1No carryout, Overflow. Sum is not correct.
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Slide52’s Complement Binary Addition
-75 + 59 = -16 1 1 1 1 1 1 1 0 1 1 0 1 0 1+0 0 1 1 1 0 1 1 1 1 1 1 0 0 0 0No carryout, no overflow. Sum is correct.
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Slide62’s Complement Binary Addition
127 + 1 = 128 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1+0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0No carryout, overflow. Sum is not correct.
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Slide72’s Complement Binary Subtraction
Subtraction Rule:To subtract one number, S, from another number, M, take the 2’s complement of the number S and add it to the number M.Example:1110 – 410, we will negate 4 using 8-bit 2’s comp and add 1110: 0000 10112 410: 0000 01002 1111 11002 (negate 4) and add 1 1 1 1 0 0 0 0 1 0 1 1 +1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 1 +710
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Slide82’s Complement Binary Subtraction
Example:Subtract 7 from 2 (2 – 7):Convert ABS to 4-bit 2s comp:7 01112 0010Perform 2s comp on 7:0111 1001Now add: 0 0 1 0 +1 0 0 1 1 0 1 1The value 1011 represented in 2’s comp converts to -510
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Slide92’s Complement Binary Subtraction
Another Example:-23 – 6, we will negate 6 using 8-bit 2’s comp and add-23: 1110 1001 6: 0000 0110 1111 1010 (negate 6) and add 1 1 1 1 1 1 1 0 1 0 0 1 +1 1 1 1 1 0 1 0 1 1 1 0 0 0 1 1 -2910
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Slide102’s Complement Binary Subtraction
Try:17 – (-6), Negate 6 using 8-bit 2’s comp and add 17: 0001 0001 -6: 1111 1010 0000 0110 (negate 6) and add 0 0 0 1 0 0 0 1 +0 0 0 0 0 1 1 0 0 0 0 1 0 1 1 1 +2310
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Slide112’s Complement Binary Subtraction
Another Example:9 – 140, we will negate 140 using 8-bit 2’s comp and add 9: 0000 1001140: 1000 1100 0111 0100 (negate 140) and add 0 0 0 0 1 0 0 1 +0 1 1 1 0 1 0 0 0 1 1 1 1 1 0 1 +12510No Carry, with overflow. Difference is not correct.
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Slide12Unsigned Binary Multiplication
Quite Easy.Rules to remember:0 * 0 = 00 * 1 = 01 * 1 = 1Same as logical “and” operation Multiplying an m-bit number by and n-bit number results in an n+m bit number. This n+m bit width ensures overflow cannot occur.Simple Example: m = n = 2 210 x 310 = 610102 x 112 = 01102Largest 2-bit value: 112 or 310112 x 112 = 10012 910
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Slide13Unsigned Binary Multiplication
Example:1010 x 610 = 6010 1 0 1 0 x0 1 1 0 0 0 0 0 1 0 1 0 1 0 1 0 +0 0 0 0______ 0 0 1 1 1 1 0 0
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Slide14Unsigned Binary Multiplication
Try:2710 x 1210 = 32410 1 1 0 1 1 x1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 +1 1 0 1 1______ 1 0 1 0 0 0 1 0 0
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Slide152’s Complement Binary Division
The parts of a division operation are:DividendDivisorQuotient Dividend Divisor
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Quotient
Division is equivalent to subtracting the divisor from the dividend a number of times equal to the quotient.
Slide162’s Complement Binary Division
Division of signed numbers:If the signs are the same, the quotient is positive.(+ / + = +) or (- / - = +)If the signs are different, the quotient is negative.(+ / - = -) or (- / + = -)
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Slide172’s Complement Binary Division
Both numbers are + so quotient will be +. Set the quotient to zero initially.Subtract the divisor from the dividend by using 2’s comp addition (11001110). Ignore the carry bit.Subtract the divisor from the 1st partial remainder using 2’s comp addition. Ignore the carry bit.Repeat until partial remainder is less than Divisor.
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Both numbers must be in uncomplemented formExample: divide 01100100 by 00110010 (10010 / 5010)
01100100 Dividend + 11001110 2’s complement of Divisor 1 00110010 First partial remainderAdd 1 to quotient: 00000000 + 1 = 00000001
00110010 First partial remainder + 11001110 2’s complement of Divisor 1 00000000 zero remainderAdd 1 to quotient: 00000001 + 1 = 00000010
So final quotient is
00000010
(
2
10
) and final remainder is 00000000
Slide182’s Complement Binary Division
Both numbers are + so quotient will be +. Set the quotient to zero initially.Subtract the divisor from the dividend by using 2’s comp addition (11001110). Ignore the carry bit.Repeat until partial remainder is less than Divisor. 6 < 8, so stop.
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Another example: divide 00001110 by 00001000 (1410 / 810)
00001110 Dividend + 11111000 2’s complement of Divisor 1 00000110 First partial remainderAdd 1 to quotient: 00000000 + 1 = 00000001
So final quotient is
00000001
(
1
10
)
and final remainder is 00000110
Slide192’s Complement Binary Division
Set the quotient to zero initially. 00000000 Subtract the divisor from the dividend by using 2’s comp addition (11110111). Subtract the divisor from the partial remainders using 2’s comp addition until the partial remainder is less than the divisor. For each subtraction, increase the quotient by 1.
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Try: Divide 00011100 by 00001001 (2810 / 910)
So final quotient is 00000011 (310) and final remainder is 00000001
00011100 +11110111 1 00010011 19<9,F,repeat
00010011 +111101111 0000101010<9,F,repeat
00001010
+11110111
1 00000001
1<9,T,stop
Slide202’s Complement Binary Division
Set the quotient to zero initially. 00000000 Subtract the divisor from the dividend by using 2’s comp addition (1111100). Subtract the divisor from the partial remainders using 2’s comp addition until the partial remainder is less than the divisor. For each subtraction, increase the quotient by 1.
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One more example: Divide 00001101 by 00000100 (-1310 / 410)
So final quotient is 00000011 (-310 signs are different) and final remainder is 00000001
00001101 +11111100 1 00001001 9<4,F,repeat
00001001 +111111001 000001015<4,F,repeat
00000101
+11111100
1 00000001
1<9,T,stop
Slide212’s Complement Binary Multiplication
Only one difference between 2’s comp multiply and unsigned multiply:Sign extend both values to twice as many bits.Ex: 1 1 0 0 1 1 1 1 1 1 0 0 x0 1 0 1 x0 0 0 0 0 1 0 1The result will be stored in m+n least significant bits.10011101100
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Slide222’s Complement Binary Multiplication
Example: 1 1 1 0 1 1 1 1 1 1 1 0 0 0 1 1 x0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 + 1 1 1 1 1 1 1 0__ 0 1 1 1 1 1 0 1 0Result located in m+n (4+4) least significant bits.1 1 1 1 1 0 1 0 -610
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Slide232’s Complement Binary Multiplication
Try: 0 0 1 0 x0 1 0 1 The result will be stored in m+n least significant bits. 0000001010
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Slide242’s Complement Binary Multiplication
Efficiency of this method?To perform a multiply instruction, product bit-width needs to be 2N when using N-bit values.Multiply instruction?Requires more complex hardware with signed values.Better way?
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Slide252’s Complement Binary Multiplication Booth’s Algorithm
Multiplication by bit shifting and addition.Removes the need for multiply circuitRequires:A way to compute 2’s ComplementAvailable as fast hardware instructionsX86 assembly instruction: NEGA way to compare two values for equalityHow to do this quickly?Exclusive Not OR (XNOR) Gate Compare all sequential bits of bit string A and bit string B. Values are equal if the comparison process produces all 1s.A way to shift bit strings.Arithmetic bit shift, which preserves the sign bit when shifting to the right.10110110 shift arithmetic right 11011011x86 assembly instruction: SAR
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A
B
A XNOR B
0
0
1
0
1
0
1
0
0
1
1
1
Slide262’s Complement Binary Multiplication Booth’s Algorithm
Example: 5 x -3First, convert to 2’s comp Binary: 5 = 0101-3 = 1101If we add 0 to the right of both values, there are 4 0-1 or 1-0 switches in 0101, and 3 in 1101. X reg should have the least number of 1-0, 0-1 switches.Pick X = 1101And Y = 0101Next, 2s Comp of Y: 1011 (for easy bin subtraction)Next, set 2 registers, U and V, to 0. Make a table using U, V, and 2 additional registers X, and X-1.
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Slide272’s Complement Binary Multiplication Booth’s Algorithm
Register X is set to the predetermined value of x, and X-1 is set to 0Rules for updating U register: Look at the LSB of X and the number in the X-1 register. If the LSB of X is 1, and X-1 is 0, we subtract Y from U. If LSB of X is 0, and X-1 is 1, then we add Y to U.If both LSB of X and X-1 are equal, do nothing and skip to shifting stage.Shifting rules:Right shift on V where LSB of U MSB of VRight shift on ULSB of X X-1Circular Right Shift on X
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U
V
X
X-1
0000
0000
1101
0
Slide282’s Complement Binary Multiplication Booth’s Algorithm
In our case, the LSB of X is one, and X-1 is zero, so we subtract Y from U.Next, we do an arithmetic right shift on U and V1011 1101, 0000 1000Copy the LSB of X into X-1And then perform a circular right shift on X1101 1110Repeat the process three more times.
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U
V
X
X-1
0000
0000
1101
0
+1011
1011
1101
1000
1110
1
Slide292’s Complement Binary Multiplication Booth’s Algorithm
The LSB of X is zero, and X-1 is one, so we add Y to U.Next, we do an arithmetic right shift on U and V0010 0001, 1000 0100Copy the LSB of X into X-1And then perform a circular right shift on X1110 0111Repeat the process two more times.
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U
V
X
X-1
1101
1000
1110
1
+0101
0010
0001
0100
0111
0
Slide302’s Complement Binary Multiplication Booth’s Algorithm
The LSB of X is one, and X-1 is zero, so we subtract Y from U.Next, we do an arithmetic right shift on U and V1100 1110, 0100 0010Copy the LSB of X into X-1And then perform a circular right shift on X0111 1011Repeat the process one more time.
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U
V
X
X-1
0001
0100
0111
0
+1011
1100
1110
0010
1011
1
Slide312’s Complement Binary Multiplication Booth’s Algorithm
The LSB of X is one, and X-1 is one, begin shifts.Next, we do an arithmetic right shift on U and V1110 1111, 0010 0001Copy the LSB of X into X-1And then perform a circular right shift on X1011 1101
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U
V
X
X-1
1110
0010
1011
1
1111
0001
1101
1
Slide322’s Complement Binary Multiplication Booth’s Algorithm
The result is stored in U followed by V.This result is stored in 2’s complement notation. Convert to decimal:11110001 00001111 -1510This gives the correct result of 5 x -3
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U
V
X
X-1
1111
0001
1101
1
11110001
Slide332’s Complement Binary Multiplication Booth’s Algorithm
Another Example: 7 x -4First, convert to 2’s comp Binary:7 0111, add zero to right gives 01110, 2 switches-4 1100, add zero to right gives 11000, 1 switch X = 1100 Y = 0111-Y = 1001, for easy bin subtract
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Slide342’s Complement Binary Multiplication Booth’s Algorithm
U V X X-10: 0000 0000 1100 01: 0000 0000 0110 02: 0000 0000 0011 0 +1001 10013: 1100 1000 1001 14: 1110 0100 1100 1 Result of 7 x -4: UV11100100 00011100 -2810
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X = 1100 Y = 0111-Y = 1001
If LSB of X=1 & X-1 = 0, Sub Y from U
If LSB of X=0 & X-1 = 1, Add Y to U
If LSB of X == X-1, begin shifts
Slide352’s Complement Binary Multiplication Booth’s Algorithm
Try: 6 x -2 using Booth’s algorithm
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Slide362’s Complement Binary Multiplication Booth’s Algorithm
U V X X-10: 0000 0000 1110 01: 0000 0000 0111 0 +1010 10102: 1101 0000 1011 13: 1110 1000 1101 1 4: 1111 0100 1110 1Result of 6 x -2: UV11110100 00001100 -1210
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X = 1110 Y = 0110-Y = 1010
If LSB of X=1 & X-1 = 0, Sub Y from U
If LSB of X=0 & X-1 = 1, Add Y to U
If LSB of X == X-1, begin shifts
Slide37Numbers are stored at addresses
Memory is a place to store bits
A word is a fixed number of bitsEx: 32 bits, or 4 bytes (based on the CPU arch.)An address is also a fixed number of bitsRepresented as unsigned numbers
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Slide38Numbering Bits and Bytes
Need to choose order for:Storage in physical memory systemTransmission over serial/parallel medium (data network)Bit orderHandled by hardwareUsually hidden from programmerByte orderAffects multi-byte data items such as integersVisible and important to programmers
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Slide39Possible Byte Orders
Least significant byte of integer in lowest memory locationLittle endianMost Significant byte of integer in lowest memory location.Big endian
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Slide40Byte Order Illustration
Which architecture is most common?Little EndianWhy?Arithmetic carries propagate towards the most significant digit.Little Endian allows the CPU to begin processing the data after having only read the first byte.
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Slide41Sign Extension
Convert 2’s comp number using N bits to more than N bits Example: short to intReplicate the MSB (sign bit) of the smaller number to fill new bits.2’s comp positive number has infinite 0s2’s comp negative number has infinite 1sEx: 16bit -410 to 32-bit: 1111 1111 1111 1100 1111 1111 1111 1111 1111 1111 1111 1100
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Slide42Conclusion
We represent “things” in computers as particular bit patterns: N bits 2NDecimal for human calculations, binary for computers, hex and oct for convenient way to write binary2’s comp universal in computing: so make sure to learn!Numbers are infinite, computers are not, so errors can occur (overflow, underflow)Understand 2’s comp division, sign extended multiplication, and efficient multiplication (Booth’s algorithm)Know the powers of 2.
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Slide43Exam 1
Tuesday, February 13th.Entire class to finish the exam, 12:45pm – 2:05pmFive equally weighted questionsCircle one question you do not wish to answer.Answer remaining four questions.One 3”x5” notecard is allowed.Submit your notecard with the exam for up to 5% credit.Your notecard must have your name on it to receive credit.Closed bookNo electronic devices allowedMaterial covered:Lectures 1-5Book chapters 1, 9, 10First two supplemental readings
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