It can be used to check for design errors eg the product of two negative numbers should always result in a positive number and also to check for input or signal errors eg two signals should never be 1 at the same time For example say that the signal ID: 36689 Download PdfTags :
Download Pdf - The PPT/PDF document "VHDL EXAMPLE ASSERTION STATEMENT Spring..." is the property of its rightful owner. Permission is granted to download and print the materials on this web site for personal, non-commercial use only, and to display it on your personal computer provided you do not modify the materials and that you retain all copyright notices contained in the materials. By downloading content from our website, you accept the terms of this agreement.
Presentation on theme: "VHDL EXAMPLE ASSERTION STATEMENT Spring Assertion statements along with Report statements are often used to check for the correctness of operation of your system"— Presentation transcript