Mathieu Benoit Outline Assembly process Methodology Results Sensor production and procurement Bumping at IZM Micron Sensor Wafer were sent to IZM for UnderBump Metallization and assembly to Timepix and Medipix3RX ASIC ID: 489986
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Slide1
Lab-measurement results on IZM thin assemblies
Mathieu Benoit Slide2
Outline
Assembly process
Methodology
Results Slide3
Sensor
production
and
procurement
: Bumping at IZM
Micron Sensor Wafer were sent to IZM for Under-Bump Metallization and assembly to Timepix and Medipix3RX ASIC
10 Sensor wafers processed by IZMThickness: 100,150,200,300,650,1500 um wafer <= 200 um thickness attached to handle wafer for processing
1
00um-on-100um assemblySlide4
Methodology
After wire-bonding, chip is powered, sensor biased at 40V
Chip threshold equalization is performed twice, mask pattern is written to disk
First equalisation lead to weird masked pixel pattern (
checkboard
)Second equalization works usually fineAn image of a Sr90 source is taken with Exposure time of 30s (every pixel should see some energy deposition)
A simple algorithm count how many pixel see no or too little signal (<20% of neighbors) and compare to mask Slide5
C03-W0126 (100-on-100um) Masked pixelsSlide6
C03-W0126 (100-on-100um) Sr90, 30s Exposure
229 masked pixel in C03-W0126
35567 pixel with no Sr90 in C03-W0126Slide7
J08-W0126 (100-on-100um) Masked pixelsSlide8
J08-W0126 (100-on-100um) Sr90, 30s Exposure
56 masked pixel in J08-W0126
56 pixel with no Sr90 in J08-W0126Slide9
J10-W0126 (100-on-100um) Masked pixelsSlide10
J10-W0126 (100-on-100um) Sr90, 30s Exposure
190 masked pixel in J10-W0126
195 pixel with no Sr90 in J10-W0126Slide11
K04-W0126 (100-on-100um) Masked pixelsSlide12
K04-W0126 (100-on-100um) Sr90, 30s Exposure
52 masked pixel in K04-W0126
52 pixel with no Sr90 in K04-W0126Slide13
K05-W0126 (100-on-100um) Masked pixelsSlide14
K05-W0126 (100-on-100um) Sr90, 30s Exposure
28 masked pixel in K05-W0126
39 pixel with no Sr90 in K05-W0126Slide15
K06-W0126 (100-on-100um) Masked pixelsSlide16
K06-W0126 (100-on-100um) Sr90, 30s Exposure
31 masked pixel in K06-W0126
31 pixel with no Sr90 in K06-W0126Slide17
Conclusion
New assemblies show pretty good yield for the bumping of 100um ASIC to 100um Sensors (5/6 perfect sensors)
Only one assembly with a catastrophic failure, plan to send it back to IZM for further X-Ray study, chip was fine before wire-bonding
Ian mention that assemblies were quite fragile
Maybe lift-off occurred during wire-bonding process
4 more assemblies with 150um n-in-p on 100um currently at the bonding lab
This is now our thinnest full functional module we ever did using this technology.I forwarded this results immediately to all colleagues involved in this task. Thomas Fritzsch
, IZMSlide18
Hitmap
, 100 on 100 um Assemblies
Unconnected pixels