Hardware Implementation of Droop - PDF document

Hardware Implementation of Droop Control for Isolated AC Microgrid By: Cristina Guzman Alben Cardenas Kodjo Agbossou Université du Québec à Trois - Rivières Québec - Canada Introduction Droops control principle ADALINE estimation technique Hardware implementation of ADALINE and Droops control Co - simulation results Experimental results Conclusion Outline 2 Smart Grid: Integration of DER privileging Renewable energy using Voltage Source Inverters (VSI) Introduction Power electronics interfaces VSI Energy storage system VSI VSI 3 Alternative and distributed energy source G WG DC Link Electrolyser H2 H O Fuel cell PV PCC AC Link Voltage and frequency control Synchronization Power Sharing 3 Literature propositions made around the stability of the isolated microgrids. Techniques based on Communication control Local control Techniques Combined Local control with communication Introduction Interfaces de puissance VSI VSI VSI PCC Distortion currents Line impedances 4 Droops control principle Basic representation of VSI power sharing 5 Basic representation of VSI power sharing Droops control principle V w ΔV Δw w 0 n m 0 P 0 P max P Q (W) (var) 0 – Q max Q max Q 0 V 0 6 ADALINE estimation technique y(k) Widrow - Hoff learning rule Estimated signal Measured signal Estimation error ADALINE :Adaptive Neural Network Weight vector W + _ X pattern vector Fourier decomposition 7 Hardware implementation of Droops and ADALINE control 8 Voltage Control PWM VSI V _REF_Droops I 0 Droops Control Frequency Droop w/P I 1 V 0 V 1 V_ REF_mod V droop f droop ADALINE S&H x Voltage Droop V/Q P&Q calculus - + x - + I mes P Q VF DDS Sine wave generator V_ LD Mn Nn w ref V ref V mes V mes V mes Conventional V/f Droops and ADALINE based voltage control IGBT VSI V LD V DC 8 Hardware implementation of Droops and ADALINE control 9 Simulink functional blocks diagram of the conventional Droops System generator functional blocks diagram of the conventional Droops control 9 Real scenario /Simulation and experimental VSI characteristics Hardware implementation of Droops and ADALINE control Description (units) VSI 1 VSI 2 Switching frequency (kHz) 12 12 IGBT max . current and voltage ( A) (V) 16, 600 16, 600 Filter inductor ( mH ) 17 12 Filter capacitor (µF) 3 1 Resistive line value ( m Ω ) 21.8 38.6 Inductive line value (µH) 90 170 Coefficient m value 3.9035e - 4 2.5466e - 4 Coefficient n value 0.0066 0.0047 The inverters characteristics are similar but not identical; the inverters output filters local synchronization and control of inverters; different line impedances between VSI output and PCC; m and n are calculated as a function of the VSI powers.             10 Experimental set - up system PC Windows Matlab / Simulink / Xilinx User Interface USB - JTAG Link Xilinx FPGA XUP V2P Board xc2vp30 - 7ff896 Output filter 195V DC source VSI control and protection signals Measurement board (ADC and isolation circuits) LEM - LV25 LEM - LAH - 50P One VSI system Current and voltage LEM Sensors LOAD 11 Hardware implementation of Droops and ADALINE control Two VSI system Test bench 195 V DC source 195V DC source FPGA measurement control FPGA measurement control Line emulators Line emulators VSI 1 VSI 2 12 Two converters evaluation Co - simulation results Simulating the same characteristics physiques Synchronization imposes of VSI is made automatically Negligible effects on voltage THD The output voltage is not affected Good power sharing 13 Test 1: one VSI experimental validation Experimental results Verification of the correct operation of the implemented droop/ADALINE control. Load variations Voltage estimation is well achieved Frequency inside the permitted limits 14 Test 2: Two parallel VSI experimental results Experimental results VSI 1 VSI 2 Power t1 t2 t3 t4 t5 15 Frequency VSI 2 Test 2: Two parallel VSI experimental results Experimental results VSI 1 t1 t2 t3 t4 t5 16 Voltage VSI 2 Test 2: Two parallel VSI experimental results Experimental results VSI 1 t1 t2 t3 t4 t5 17 Implementation cost of control algorithms for the Xilinx xc2vp30 - 7ff896 FPGA Experimental results Resource Used Available % Usage Slices 7,122 13,696 52% 4 input LUTs 11,698 27,392 42% RAMB 16 s 66 136 48% MULT 18 X 18 s 76 136 55% FPGA Slices Used Available 18 Real view of the Droops control / VF - ADALINE network for VSI synchronization and load sharing in a microgrid. The FPGA implementation has permitted a real - time control and power analysis without communication between VSIs Good steady and transient response using ADALINE based control. Current and future works: advanced local control strategies going forward future smart microgrids. Conclusion 19 Thank you! Question time ! Anexe Experimental setup parameters: AC Power Source: 120VAC/60Hz. Signals sampling period: T s =10µs. FPGA clock period: T FPGA =10ns. Fundamental frequency: f 0 =60Hz ROM sine table length: 2P=215 Power electronics converter characteristics: Voltage Source Inverters: 16A, 600V IGBT full bridge (IRAMX16UP60A) DC source voltage: 195V.