PPT-The High-Level Synthesis approach to accelerator design

Author : cheryl-pisano | Published Date : 2016-09-10

ISCA 2015 Jason Cong and Brandon Reagen HighLevel Synthesis A Brief History Early attempts Research projects 1980s early 1990s Rise and fall of early commercialization

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The High-Level Synthesis approach to accelerator design: Transcript

ISCA 2015 Jason Cong and Brandon Reagen HighLevel Synthesis A Brief History Early attempts Research projects 1980s early 1990s Rise and fall of early commercialization Tools from major EDA vendors. Shekhar Mishra. 2. . Project-X. (Yousry Gohar. 1. , David Johnson. 2. , Todd Johnson. 2. ) . 1 Argonne National Laboratory. 2 Fermi National Accelerator Laboratory. Project-X: Nuclear Energy Application. with SystemC and OSSS. Objective Systems Solutions. Christian Stehno. OFFIS – Institute for Information Technology. HW/SW Design Methodology Group. Oldenburg, Germany. Outline . Motivation. Why do we need improvements towards ESL/HLS . Automation from Concept to Prototyping. David Brooks, Jason Cong, . Zhenman. Fang, . Yakun Sophia Shao. , and Sam Xi . Harvard . University & UCLA. Tutorial Outline. Time. Topic. Speaker. 8:30 am – 9:00 am. James . Coole. PhD student, University of . Florida. Aaron . Landy. PhD student, University of Florida. Greg . Stitt. Associate . Professor of ECE, University of Florida. Catapult Workshop. This work is supported by National Science Foundation grant CNS-1149285 and the I/UCRC Program of the National Science Foundation under Grant No. EEC-0642422.. James . Coole. PhD student, University of . Florida. Aaron . Landy. PhD student, University of Florida. Greg . Stitt. Associate . Professor of ECE, University of Florida. Catapult Workshop. This work is supported by National Science Foundation grant CNS-1149285 and the I/UCRC Program of the National Science Foundation under Grant No. EEC-0642422.. Driven System Target Requirements and R&D. Stuart Henderson. Fermilab. January 13, 2012. Accelerator Driven Systems. High-power, highly reliable proton accelerator. ~1 . GeV. beam energy. ~1 MW of beam power for demonstration. : High-Level Synthesis . for FPGA-Based Processor/Accelerator Systems. Students: Andrew . Canis. , . Jongsok. . Choi. , Mark . Aldham. , Victor Zhang, Ahmed . Kammoona. Faculty: Jason Anderson, Stephen Brown. The Status and Road Map. 1. . Haci. . S. ogukpinar. . Eskisehir. Osmangazi . University. . . Turkey. . Outline. T. urkish. . Accelerator. . Center. Project. Proton . Accelertor. d’Unité. de . Traitement. ECE 667. Fall 2014. Synthesis and Verification. of Digital Circuits. 2. Design flow for DSP applications. High-level Model. (C, . Matlab. ). High-Level Synthesis. . RTL Model. Yakun. . Sophia. . Shao. May 9. th. , 2016. Harvard. . University. Phd. Dissertation Defense. Harvard. . University. Moore’s Law. 2. CMOS Scaling is Slowing Down . http://. www.anandtech.com. /show/9447/intel-10nm-and-kaby-lake. Outlook and Strategy. Tor Raubenheimer. May 4, 2011. Introduction. SLAC has broad accelerator expertise. Accelerator and accelerator systems design. Beam physics and computing. Advanced accelerator concepts. U. Amaldi (TERA), V. Bencini (CERN), E. Benedetto (TERA/CERN/SEEIIST), M. Dosanjh (CERN/SEEIIST), P. Foka (GSI), D. Kaprinis (Kaprinis A.), M. Khalvati (CERN), A. Lombardi (CERN), M. Sapinski (GSI/CERN), M. Vretenar (CERN). Manual HDL for HEP applications. Marc-André . Tétrault. IEEE NPSS Real Time Conference 2018. Williamsburg. Overview. What/why High Level Synthesis (HLS). First contact account. Signal processing design. via High-Level Synthesis on FPGAs. Luciano Lavagno. l. uciano.lavagno@polito.it. Objectives and approach. Electronics. Group. 2. Provide HW efficiency with SW-like non-recurrent engineering cost. Exploit recent advances of High-Level Synthesis to...

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