PPT-Accelerating Precise Race Detection Using Commercially-Available Hardware Transactional

Serdar Tasiran Koc University Istanbul Turkey Microsoft Research Redmond Hassan Salehe Matar Ismail Kuru Koc University Istanbul Turkey Roman Dementiev Intel Munich Germany. tumde Abstract So far transactional memoryalthough a promising techniquesuffered from the absence of an ef64257cient hardware implementation The upcoming Haswell microarchitecture from Intel introduces hardware transactional memory HTM in mainstream Memory. Supporting Large Transactions. Anvesh. . Komuravelli. Abe Othman. Kanat. . Tangwongsan. Hardware-based. . Concurrent Programs. obj.x. = 7;. find_primes. ();. // intrusion test. if (. obj.x. Maurice . Herlihy. Computer Science . Dept. Brown University. 2. Not important:. The details.. Important. Irrevocable change. 3. How to think about Synchronization. Poor synchronization . ruins everything. Hardware: Challenges and Opportunities. Author. : Bingsheng He. (Nanyang Technological University, Singapore) . Speaker. : . Jiong . He . (Nanyang Technological University, Singapore. ). 1. What is Approximate Hardware?. Rajwar. , R., . Herlihy. , M., and Lai, K. 2005. presented by . VasilyVolkov. , 04/30/08. Motivation. Transactional Memory is good. Never deadlocks. Makes concurrent programming easier. But requires programmer to be aware of. Patrick Santos (4465359). 1. Agenda. What is transactional memory (TM)?. Example transactions. Deadlocks and Cache Coherence. Types of TM. Implementations . & proposals . in industry. Sun / Oracle. Swarnendu Biswas. , UT Austin. Man Cao. , Ohio State University. Minjia Zhang. , Microsoft Research. Michael D. Bond. , Ohio State University. Benjamin P. Wood. , Wellesley College. CC 2017. A Java Program With a Data Race. Swarnendu Biswas. , UT Austin. Man Cao. , Ohio State University. Minjia Zhang. , Microsoft Research. Michael D. Bond. , Ohio State University. Benjamin P. Wood. , Wellesley College. CC 2017. A Java Program With a Data Race. Prof. Smruti R. Sarangi. IIT Delhi. Outline. Multicore Processors. Parallel Programming Pardigms. Transactional Memory: Basics. Software Transactional Memory(STM). Hardware Transactional Memory. Multicores in the last Five Years. John Erickson, . Madanlal. . Musuvathi. , Sebastian Burckhardt, Kirk . Olynyk. Microsoft . Research. Motivations. Need for race detection in Kernel modules. Also must detect race conditions between hardware and Kernel. Prof. Smruti R. Sarangi. IIT Delhi. Outline. Multicore Processors. Parallel Programming Pardigms. Transactional Memory: Basics. Software Transactional Memory(STM). Hardware Transactional Memory. Multicores in the last Five Years. Meltem Ozsoy. *. , Caleb . Donovick. *. , . Iakov. . Gorelik. *. ,. Nael. Abu-. Ghazaleh. **. and Dmitry . Ponomarev. *. *. Binghamton University, . **. University of California, Riverside. HPCA 2015 - San Francisco, CA. Applications, Availability, and Marketability. Benjamin . Babineau. Matthew Best. Sean Farrell . Outline. Why This Project?. Background. Types of Biosensors. Applications. Commercially Available Biosensors. Alvaro Moreira & Luigi Carro. Instituto de Informática – UFRGS . Brasil. 1. Outline – Part III. Work . done at UFRGS on . detection/correction . of . Control Flow Errors (CFEs) with LLVM. Similarities and differences with Security.