PPT-Window-Based Greedy Contention Management for Transactional Memory

Gokarna Sharma LSU Brett Estrade Univ of Houston Costas Busch LSU 1 DISC 2010 24th International Symposium on Distributed Computing Transactional Memory Background The emergence of multicore architectures. tumde Abstract So far transactional memoryalthough a promising techniquesuffered from the absence of an ef64257cient hardware implementation The upcoming Haswell microarchitecture from Intel introduces hardware transactional memory HTM in mainstream Gokarna. Sharma. Costas Busch. Louisiana State University, USA. WTTM 2010 - 2nd Workshop on the Theory of Transactional Memory. 1. TexPoint fonts used in EMF. . Read the TexPoint manual before you delete this box.: . John Mellor-Crummey and Michael Scott. Presented by Shoaib Kamil. Overview. Review of some lock types. MCS lock algorithm. Barriers. Empirical Performance. Discussion. Review of Lock Types. test&set. Memory. Supporting Large Transactions. Anvesh. . Komuravelli. Abe Othman. Kanat. . Tangwongsan. Hardware-based. . Concurrent Programs. obj.x. = 7;. find_primes. ();. // intrusion test. if (. obj.x. toabortoneanother,thenlive-lockcanhappen.Betweentheseextremes,whatkindsofprogressproperties,ifany,canoneguarantee?Adaptivebackoseemstoworkwellinpracticewhentransactionshaveroughlythesamesize,butisles Rajwar. , R., . Herlihy. , M., and Lai, K. 2005. presented by . VasilyVolkov. , 04/30/08. Motivation. Transactional Memory is good. Never deadlocks. Makes concurrent programming easier. But requires programmer to be aware of. A. Smith; based on slides by E. Demaine, C. Leiserson, S. Raskhodnikova, K. Wayne. Guest lecturer: Martin . Furer. Algorithm Design and Analysis. L. ECTURE. 5. Greedy Algorithms. Interval. Scheduling. Patrick Santos (4465359). 1. Agenda. What is transactional memory (TM)?. Example transactions. Deadlocks and Cache Coherence. Types of TM. Implementations . & proposals . in industry. Sun / Oracle. Gokarna Sharma. (A joint work with . Costas Busch. ). Louisiana State University. Agenda. Introduction and Motivation. Scheduling Bounds in Different Software Transactional Memory Implementations. Tightly-Coupled Shared Memory Systems. Maurice Herlihy (DEC), J. Eliot & B. Moss (UMass). Presenter: Mariano Diaz. CS 5204 – Fall, 2009. Part 1: Concepts and Hardware-based Approaches. Introduction. What’s a transaction?. Transaction: a finite sequence of machine instructions, executed by a single process, that satisfies the following:. Prof. Smruti R. Sarangi. IIT Delhi. Outline. Multicore Processors. Parallel Programming Pardigms. Transactional Memory: Basics. Software Transactional Memory(STM). Hardware Transactional Memory. Multicores in the last Five Years. Définition. La contention a pour objectif de limiter les capacités de mobilisation d’un individu de manière à le sécuriser ou protéger son environnement. Recouvrant différents aspects, elle doit néanmoins rester exceptionnelle et s’associer à d’autres prises en charges thérapeutiques. . Prof. Smruti R. Sarangi. IIT Delhi. Outline. Multicore Processors. Parallel Programming Pardigms. Transactional Memory: Basics. Software Transactional Memory(STM). Hardware Transactional Memory. Multicores in the last Five Years. Alvaro Moreira & Luigi Carro. Instituto de Informática – UFRGS . Brasil. 1. Outline – Part III. Work . done at UFRGS on . detection/correction . of . Control Flow Errors (CFEs) with LLVM. Similarities and differences with Security.