Reconfigurable MapReduce Framework & Accelerator - PowerPoint Presentation

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Uploaded On 2017-10-18

Reconfigurable MapReduce Framework & Accelerator - PPT Presentation

Presented By Shefali Gundecha Srinivas Narne Yash Kulkarni Papers to be discussed Y Shan B Wang J Yan Y Wang N Xu and H Yang FPMR MapReduce Framework on FPGA A Case Study of ID: 597204

key mapreduce memory data mapreduce key data memory framework accelerator reduce mappers performance fpga values speedup results application bin cdp bits applications

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