FUTURE NEEDS IN EMC OF ICS - PowerPoint Presentation

Slide1

FUTURE NEEDS IN EMC OF ICS ARE YOU HEARING THE VOICE OF INDUSTRY?Etienne SICARDProfessoretienne.sicard@insa-toulouse.frINSA TOULOUSE - FRANCE www.etienne-sicard.frwww.ic-emc.orgSlide2

Home of Rugby (& INSA engineer)

Home of Airbus

A380

TOULOUSE

2850 Km

Edinburgh

Toulouse

Home of some past EMC Compo’sSlide3

QUESTIONS ASKEDCURRENT CHANGESCHALLENGESOPPORTUNITIESTHREATSCONCLUSIONSUMMARYSlide4

“Would be interested to give one of the keynote talks on ‘state of the industry’ such as current changes, challenges and opportunities / threats to the EMC of ICs … or generally related to that

?”

Alistair

QUESTIONS ASKED

I

would

be pleased

to

accept the challenge,

however

my

experience

and vision is

mostly academic. I suggest to contact ASAP industrial

EMC VIP's

and compile their

opinion about the

very

sensitive questions

you

have

listed

.

EtienneSlide5

Email to a selection of industrial colleagues“Would you accept to send me some keywords to feed the following sectionsCurrent changesChallenges OpportunitiesThreatsThank you… »15 answers receivedQUESTIONS ASKEDSlide6

Jan Niehof, NXP SemiconductorsFrank Klotz, Infineon Tech. AGBernhard Weiss, AMSJean-Luc Levant, AtmelFrédéric Lafon, VALEOErping LI, IHPCJounghuo Kim, KAISTOlivier Maurice, IRSEEMSebastien Serpaud, NEXIORenaud Gillon, ON SemiHyun Ho PARK, SamsungTHE VOICES OF INDUSTRY

Christian Marot, Airbus Group Innovation

Sebastien

Serpaud

,

NexioKieran Heffernan, Analog DevicesAbhishek Ramanujan, ValeoAdil El Abazzi, SermaSlide7

THE VOICES OF INDUSTRYSlide8

Regroup comments by relevanceAdd illustrationsAdd some explanationsOPERATING MODE« Let me introduce the Industrial Needs »Slide9

CURRENT CHANGESSlide10

CURRENT CHANGES

Industry

Meeting the Industrial 4.0 challenge

: cyber-physics systems

Productivity, Efficiency, Safety, ConnectivitySlide11

TechnologyFaster and faster memory DDR4, LPDDR is on the market DDR5, LPDDR5 is under development CURRENT CHANGES

2010

Laptop Memory

2012

2014

2016

2018

2020

Data Rate per pin (Gb/s)

DDR3

DDR2

1 Gb/s

10 Gb/s

100 Gb/s

WideIO

LPDDR2

LPDDR3

DDR4

LPDDR1

Mobile Memory

WideIO2

LPDDR4

DDR5

We are Here

3D

2D

DDR4: 250psSlide12

Technology 2.5D high bandwidth and high density DRAM with TSV and Si Interposer 1 tera-bit/cm2 achieved 5 years ahead from roadmapsCURRENT CHANGES

We are HereSlide13

DesignEMC concerns move from system-level to IC-levelEMC/interference is taken into account from the very early design phasesIncreased use of simulation & modelingMeasurement should (preferably ) only confirm a good EMC modeling / simulation workCURRENT CHANGES IN EMC OF ICS

DESIGN PHASE

System

Architecture

System Design

FABRICATION

EMC compliant

EMC Simulations

Compliance ?

GO

NO GO

Guidelines

Tools

ModelsSlide14

DesignReduction of external componentsEnergy saving : low standby and quiescent current More Ios, more power pinsIntegrated Voltage RegulatorsSwitched-mode power supply at faster speedsCURRENT CHANGESSlide15

Internet of thingsCURRENT CHANGES IN EMC OF ICSSlide16

AirplanesIntegrated Modular Avionics architecture, cards and backplane approach rather than electronic boxes and rackContext of very long life timeObsolescence of componentsLess weightLower costSaferCURRENT CHANGES IN EMC OF ICSSlide17

Cars: Semi, Automatic Drive SystemsMicrocontrollers with medium-voltage (12V) medium-power (1W) section for CANCURRENT CHANGES IN EMC OF ICSSlide18

MobilesImproved IC-level system integration : SiPs, SoCs, 3D-IC…China is the largest producer of Mobile devices world wide: big EMC-IC demandCURRENT CHANGES IN EMC OF ICSDual Image Signal Processing: face detection, wide dynamics,3D

LTE, WiMax

Quad

core

ARM Cortex A15

4-channel DSP

Console quality gaming Capture and play back 4K video 7.1 surround sound GPS, Glonass BeiDou satellite constellations in/outdoor4K mobile/TV display

Sensor

intensive applicationsQualcomm

Snapdragon 805 processor data

sheetSlide19

CURRENT CHANGES IN EMC OF ICS

4G

800

2,3,4,5G mobile frequencies

2-3G

900

1 GHz

2-4G

1800

3G

1900

2 GHz

4G

2600

3 GHz

5G

3600

5G

700

5G

10 500

5G

17 000

5G

28 000

5G

38 000

10 GHz

20 GHz

30 GHz

Tomorrow

TodaySlide20

CostsPressure for cost reductionEMC test costs increased Late analysis of EMC usually lead to extra costsOff-the-shelf components are become very popular, but EMC performances are usually unknownCURRENT CHANGES IN EMC OF ICSSlide21

Transient ImmunityKnowledge on harmonic immunity has increasedPressure for transient immunity tests at IC level Close to ESD tests, Electrical Over StressIntegrated Circuit Fast Transient (ICFTM) under consideration by IEC for standardizationCHALLENGES IN EMC OF ICSL. Glaesser, 2015Slide22

CHALLENGESSlide23

TechnologyLower operating current/voltages in same environmentLower supply voltages leads to lower noise marginsCHALLENGES IN EMC OF ICS

5.0

3.3

2.5

1.8

0.35µ

0.18µ

90n

65n

Technology node

1.0

Supply (V)

1.2

45n

I/O supply

Core supply

32n

20n

14n

130n

10n

7n

0.8 V

inside,

1.2V

outside

14-nm technologySlide24

TechnologyMany different types of packages available, but information difficult to obtainNon-standard 3D technology (various Through-Silicon-Via dimensions, die thickness..)CHALLENGESSlide25

TechnologyIsolation between very low voltage (1-3V), medium voltage (12V) and high voltage (48, 98, 240, 300, 400, 850V) functionsADC with 16-24bit resolution work at 10-100µV resolution while IO noise is 10-100mV dynamic rangeCHALLENGES IN EMC OF ICSSlide26

TechnologySmart-power IC contains 100+ pockets and 10+ power domainsStandard TCAD tools can not cope with chip complexity and dimenionsSimulation of EMC requires simplification & approximations for model-order-reductionCHALLENGES IN EMC OF ICSSlide27

CHALLENGES IN EMC OF ICS

Design

Various

operating voltage require voltage translators, complex layout and loose power

Internal

supplies deliver very high currentsEmebbed coils

and decaps need to be very carefully designed and optimisedPackage-IC co-simulation required for optimizationSlide28

Increased frequenciesEMC at IC level usually characterized upto 3GHzRequests at 6 GHz for communicating cars5G may operate above 20 GHzCar radars 24, 77 GHzCHALLENGES IN EMC OF ICS

0

20

40

60

80

100

10 MHz

100 MHz

1 GHz

Parasitic Emission (dB)

10 GHz

100 GHz

IC

Parasitic

Emission

Customer pressure

Customer

Concerns

in 5

years

IC

technology

scale

down

10

yearsSlide29

Increased frequenciesAbove 1GHz, skin effect Non constant permitivityInsulator structureHumidity, roughness…CHALLENGES IN EMC OF ICSC. Chastang PhD 2013Slide30

MobilesAs DRAM is becoming faster, significant signal integrity issues to meet required eye diagram and bandwidth. Display Driver IC is becoming important sources of noise coupling to adjacent antenna on smart phone There are direct noise couplings from IC to adjacent antenna on smart phone There are noise coupling from power to I/O causing SI-PI co-problemsCHALLENGESSlide31

Mixed-Signal IssuesSimulations are still a challenge due to the lack of good behavioral models for analogue functions.Models do not reproduce the state-dependent behavior of the ICMeaning-full debugging analyses at system-level are difficult to performedCHALLENGESSlide32

Models & toolsEMC predictions often far from real-case measurementsDifficulty to get relevant physical data (IC, package, PCB)Difficulty to convert physical data into accurate modelIn the case of IC obsolescence, models could help predicting EMC rather than requalify the full equipmentCHALLENGESSlide33

Models & toolsIBIS widely available but quality and relevance not guaranteedIBIS/EMI part emptyIEC 62 433 model standards but very few models availableExchange of models unclearExploitation of models (IBIS, ICEM) in commercial tools difficult and subject to variabilityCHALLENGESI/V curve should be monotonous

At 1.8V,

Ion may be incorrect

IEC 62433

series

Conducted mode

Radiated modeEmission model (ICEM)ICEM-CE ICEM-REIEC 62433-3IEC 62433-2 Ed. 1.0

IEC 62433-2 Ed.

2.0Immunity model (ICIM)ICIM-CIIEC 62433-4

ICIM-RIIEC 62433-5

Fast Transient model (ICFTM)ICFTM-CI

IEC 62433-6-Slide34

DesignCustomers know their system level EMC tests but mostly have no idea of chip level tests. System design is often not finished when chip development starts. A bad PCB design and wrong external components can destroy a good EMC performance of an ICCHALLENGES

separate supply

substrate isolation

increasing separation between sensitive blocks

Adrijan

Barić

,

EMC

Compo 2011

Generic

IC EMC Test

SpecificationSlide35

System-On-Chip immunityEmbedding a wide set of heterogeneous functions makes test conditions difficult to specific, to guarantee immunity of the system in all situationsFunctions with compatibility risks should be segregatedCHALLENGESSamsung Exynos OctaSlide36

OPPORTUNITIESSlide37

Automatic drive will require highly intensive and reliable computingTrend towards hybrid/electrical car for low carbon emissionMulti-sensor approachA lot of EMC concerns pendingOPPORTUNITIESSlide38

Internet of ThingsNew mass production markets of connected systems and their variants will lead to much more diversified EMC solutions, with minimum or no shielding, lower costs and will generate more intelligent solutions and approaches for EM compliance OPPORTUNITIESSlide39

Co-DesignChip package co-design and signal integrity simulation Chip package co-design and power integrity simulation EMC community getting closer to Power/Signal Integrity community OPPORTUNITIESDQ24-31

DQ0-7

DQ8-15

DQ16-23

CA0-9

DDR1_CLK

A1

AC1

A23

AC23Slide40

TechnologyLow-profile packages reduce the area of possible resonance loops which could act as radiating magnetic dipolesEasier integration of decoupling or tuning elements like capacitors, inductances, resistors or diodes inside the packageOPPORTUNITIESSlide41

TechnologyGaN power devices for increased efficiencyOperates upto 650 VOPPORTUNITIESSlide42

Going 3D3D technology improves electronic efficiency, and provide natural shieldingsOPPORTUNITIES

Paul

Siblerud

, www.emc3d.org

Slide43

Thinned

memory die

10 µm

Multicore

350 µm

thickness

Direct bond

interconnect

(DBI)

Package

leadframe

(GND)

Through

Silicon

Via (TSV)

Possible 3rd die

Bottom

die

Upper

die

Processor die

OPPORTUNITIES

Going

3D

3D

technology

uses

stacked

dies, TSV, DBI,

etc

Enables

10-20 Gb/s/pin at 1.0V

Samsung 3D vs PoP:

30%

faster

20%

less

power

Less

heat

http://www.youtube.com/watch?v=Rw9fpsigCfkSlide44

Measurement methodsDevelop measurement methods above 1 GHzX-DPI upto 16 GHzGTEM cell upto18 GHzNear-field scan with miniature probes upto several GHzNovel materials or design concepts for more efficient measurements (ferrites)Integrated probes OPPORTUNITIESyincheng.chang@narlabs.org.tw

: XDPI

proposal

A. Boyer EMC Compo 2015Slide45

Models & SimulationA fast, reliable and easy to handle EMC simulation software to simulate the whole chip for system and predict chip level EMC testsMulti-physics (electrical, thermal, mechanical) modeling, simulation, and design for System ICs and 3D-ICsOPPORTUNITIESSlide46

EquipmentBoardComponentModels & SimulationThe IC-level EMC models are inspiring electronic system designers to build and exchange modelsICEM and ICIM models will provide a basis to treat aging and obsolescenceOPPORTUNITIES

PhD A. C.

Ndoye

, INSA, 2010Slide47

Instrumental ICsConfigurable IC for EMC optimizationEmbedded on-chip measurement systemsEMC sensors on-chipOPPORTUNITIESM. Deloge, 2015S. Ben Dhia, 2012Slide48

Costs savingsFirst-time EM compatible design/product helps saving a lot of moneyEMC optimization for IC product, definition, measurement and technical support can be a potential differentiatorOPPORTUNITIES

Fail

PassSlide49

Cost savingsReorient EMC tests to more relevant constraintsConsider reasonnable limits, linked to real-case applications, instead of default limitsDevelop low cost investigation tools for early handling of EMC (scanner, on-chip)OPPORTUNITIESSlide50

More and more, consumers expect detailed explanations of unforeseen failures, but in return expect corrective actions and the setting of a methodology so that the failure do not occur again.EMC is an opportunity and leverage to be a market leader in components & systems, rather than as a constraint to be treated at the last minute.OPPORTUNITIESP. Schroter, 2015Slide51

THREATSSlide52

Cost of nano-CMOSMuch more complex processChallenges in nano-scale patterning20 companies in 130nm4 companies (alliances) in 14nm7 Billion $ fab costIC design cost explosion: THREATS IN EMC OF ICS1 RUN ITERATION10 M$1 IC DESIGN150 M$

A.

Manocha

, Foundry driven innovation in the mobility era, Global Foundries, 2013Slide53

HumansLack of EMC engineers with knowledge on IcsNot enough engineers who can design and simulate chip and package together Not enough engineers who can handle signal & power integrity together Non-EMC aware project managementTool EfficiencyCommunication and data sharing between IC, package, and PCB design level very difficultLimits of CAD and computational resources Efficient modeling and simulation methods simulating “Tera-device” problems not (never?) availableTHREATS IN EMC OF ICSSlide54

DesignEnormous problems to isolate LV from HVRadiated and conducted emission of HV perturbates LVMulti Giga bit/s Video and entertainment processors sensitive to RF noiseEMI compliant systems rely on immunity models of components that are hardly availableTHREATS IN EMC OF ICSSlide55

CONCLUSIONSlide56

Industrial participants to EMC Compo and some “VIPs” close to industry have shared keywords about future needs in EMC of ICsIndustry 4.0Automated carsConnected objectsHigher complexityHigher frequenciesNeeds for models, simulations, predictionsCost issuesSkilled engineer issues CONCLUSION

CONCLUSIONSlide57

Thank you for your attentionThanks to the industrial partners and to Alistair DuffyPreferably ask questions to Industry, not to me Slide58

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