EMC design guidelines applied - PowerPoint Presentation

1. EMC design guidelinesapplied to electronic circuit1Or try to find your EMC ennemy to choose the appropriate way to kill it Sébastien GirardUniversité Clermont AuvergneInstitut PascalSebastien.girard@uca.fr

2. 2Introduction to EMCWhat is EMC?Already been in touch with EMC?Is EMC an important subject?

3. 3Emission of EM wavesSusceptibility to EM wavesTWO MAIN CONCEPTSPersonal equipmentsSafety systemsinterferencesHardware faultSoftware failureFunction LossComponentsEquipmentsCarbon airplaneBoardsRadarIntroduction to EMC

4. 4SUSCEPTIBILITY ISSUESMore complex electronic  more failure typesIntroduction to EMC

5. 50,7 µm, 5V 100k transistors, 50 MHz 10 mA/ns0,1 µm, <1V 500M transistors, >2 GHz 5 A/nsNo EMC faultUnwanted emission+Very EM susceptibilityEMC on electronic device

6. 6EMC on electronic device

7. 7Common impedanceDifferential modeInductive crosstalkCapacitive crosstalkField to wire coupling (E & H)Conducted (I & U)Radiated ( E & H)(cables, slot, shielding deffect)EMC coupling path/coupling modes

8. 8Common mode / Differential modeDifferential modeEg: Power supply, USB, RS485 …Small Z variationCommon modeGround as return pathHuge Z variationMost of cases: CM is THE COUPLING mode for EMC pbMajor common mode coupling mechanisms Common mode impedance Inductive & capacitive crosstalk Field to cable coupling Field to loop couplingEMC coupling path/coupling modes

9. 9Common mode impedanceMost frequent in EMCZ = conductor impedanceGround in most case10x10 cm² Cu ground planIn LF  Resistive (e dependent)Ground planeZsquare (tension between 2 opposite side) In HF  skin effect Z Z =Application: ground plan Cu 10x10cm @ 30 MHzZGP = 2mΩEMC coupling path/coupling modes

10. 10Common mode impedancePrinted circuit ground trackIn LFL, e, d in mmL, e, d in meApplication: track Cu 10x 0,1cm 35µm thick @ 30 MHzIn HFTo minimize CM impedance coupling  reduce ZCM EMC coupling path/coupling modes

11. 11Inductive crosstalk couplingBIpIvWhen 2 circuits are parallel for a given lengthIp source currentMagnetic fieldCoupling IV currentHighly important in HFBecause termination impedances on victim circuit going downIn this case, the tension U on the victim is expressed as U=2.P.F.M.IpF  frequency of IPM  mutual inductance between 2 linesIP  Current flowing through the agressor line EMC coupling path/coupling modesReduce loop surface minimize dI/dtSourceCoupling pathPull away lines or dont place them in parallel modeVictimReduce loop surface use shielded cables

12. 12Capacitive crosstalk couplingVpVvWhen 2 circuits are parallel for a given lengthVp source Electric fieldCoupling VVHighly important in LFBecause termination impedances on victim circuit going high vs line impedanceI=2.P.F.Cm.UpIn this case, the current I on the victim is expressed as F  frequency of VPCM  mutual capacitance between 2 linesUP  Voltage of the agressor line EMC coupling path/coupling modesReduce line length minimize dV/dtSourceCoupling pathPull away lines or use twisted linesVictimReduce line length use use wire coating with poor er

13. 13SIGNAL INTEGRITYSimplified view of EMC troubleshooting External perturbation Signal integrityPerturbation on signal Power integrityPerturbation on power distribution

14. 141) DESIGN RULES – Zoning in functional blocksSIGNAL INTEGRITYNeed to knowSensitive partsEmissive partsRegroup same kind of technology

15. 154) Ensure a controlled and short return current pathPlace a full ground plane on microstrip line.Avoid slot in return plane (e.g. ground plane)Keep a symmetry (avoid unbalance in the return current path)Avoid routing of critical signals along board edge.Avoid 90° angle on tracksSIGNAL INTEGRITY

16. 164) Ensure a controlled and short return current pathSIGNAL INTEGRITY

17. 175) Increase isolation between emission and victime linesIncrease the distance between traces (rule 3 W = “the separation between traces must be 3 times the width of the trace as measured from centerline to centerline of two adjacent traces”)(εr = 4.5)Substrategroundht W < 3W WSIGNAL INTEGRITY

18. 185) Good choice on layer organisationBest results when signal layer is embedded between GND/GND or VDD/GNDCurrent through Cde @ 25MHz clock signalSIGNAL INTEGRITY

19. 19 External perturbation Signal integrityPerturbation on signal Power integrityPerturbationOn power POWER INTEGRITYSimplified view of EMC troubleshooting

20. 20Power supply routing strategyPlace alimentation pins as close as possible to increase decoupling capacitor that reduces voltage fluctuations reduce current loop that generate magnetic fieldPOWER INTEGRITY

21. 21Reduce interconnect parasitic (inductance) of power and ground connectionsThe idea  grounding techniques prevent noisy signals to flow back to sensitive areaSingle point grounding with serial circuitsDirect grounding to a reference ground planeAlimAlimI3I2 + I3I1+I2+I3Reduction of the surface current loopCaution of the circuit order !!!!Sensitive circuit in firstNot to use for digital application with high I Multiple point grounding techniqueNeed a ground plane Reduction of return path impedanceReduction of the surface current loopUseful for digital application POWER INTEGRITY

22. 22Reduce power supply bounce as close as possible from noise source Add decoupling capacitorWithout EMC solution, voltage bounce on power supply VDD and ground reference VSSVoltage impedance between VDD & VSS must be low (inferior to target impedance)POWER INTEGRITY

23. 23POWER INTEGRITYReduce power supply bounce as close as possible from noise source Add decoupling capacitorThe most efficient method to reach the target impedance is the decoupling capacitorFminFmaxFreqKeep current flow internalLocal energy tankReduce power supply power drop

24. 24Reduce power supply bounce as close as possible from noise source Add decoupling capacitorVoltage regulatorICPCBDecoupling capacitorVddVssVddVssVoltage bounce v(t)i(t)Local charge tankIn time domainIn frequency domainLarge capacitors react rapidly to charge demandLarge capacitors reduce PDN (passive distribution network) impedancePOWER INTEGRITY

25. 25Reduce power supply bounce as close as possible from noise source Add decoupling capacitorX7R 50 V ceramic capacitors100 µF electrolytic capacitorModification of decoupling efficiency frequency band cDecoupling capacitor technology is also a key issuePOWER INTEGRITY

26. 26Reduce power supply bounce as close as possible from noise source Add decoupling capacitorInfluence of multiple capacitor usedPOWER INTEGRITY

27. 27Reduce power supply bounce as close as possible from noise source Add decoupling capacitor routing strategyPOWER INTEGRITY

28. 28Reduce power supply bounce as close as possible from noise source Add decoupling capacitor exampleZ PDN (VNA measurement)Board + IC without decapWith 6×100 nF decapZTCircuit producing significant noise in 1 – 500 MHz(IC controler)POWER INTEGRITY

29. 29POWER INTEGRITYReduce power supply bounce as close as possible from noise source Add decoupling capacitor exampleNominal alimentation tracksNoisy signal in both temporal and frequential domainsAdd decoupling capacitorReduce capa heightWhat about using wide GND track?Reduce track loopReduce loop againand againReduce loop using CMS capa I said as wide as possible Copper is cheap let’s go

30. 30CONCLUSIONThanks to allAnd have fun with EMC

31. 31External electromagnetic perturbation External perturbation Signal integrityPerturbation on signal Power integrityPerturbation on power distributionSimplified view of EMC troubleshooting

32. 32External perturbation sources : summaryExternal electromagnetic perturbation

33. 33External perturbation sourcesExternal electromagnetic perturbation

34. 34Lightning strike 200m away from your homeI = 25 kA and rise time Tr=1µsElectric path is 50m² loopWhat’s the voltage induced?External perturbation sources : lightning exampleExternal electromagnetic perturbationAjouter ex d’apres

35. 35Surge protectors: Gas discharge tubeHigh rated current (>10kA)Low capacity (1pF)High voltage allowed (>10kV)Delay triggeringLeakage currentHigh dI/dt on triggering Varistance (ZnO)CheapQuick (1ns response time)High energy (>100J)AgeingBad dead (explosion)High capacity (some nF) Zener diodeVery cheapVery small sizeFragile/ low energy (<0,1J)Serie resistance (>10Ω) Transzorb (Transil)Quick (0,5ns response time)High rated current (1kA)Short circuit deadFragile/ low energy (<2J)High capacity (some nF) TRISILHigh I.tCheapMounted for line phoneFragile/ low energy (<1J)Explosion in deathNo wide tension choiceSolution to external EM perturbation

36. 36FERRITESolution to external EM perturbationIncrease impedance of cable/transmission lineWorking as a common mode inductance

37. 37FERRITESaturation pbSolution to external EM perturbationPerturbationinducedPerturbationinducedIncrease impedance of cable/transmission lineWorking as a common mode inductance

38. 38Filter on source supplyINOUTPerturbating Current IHigh ZLLow ZCZL = jLωZC =1/ jCωBlocking perturbationControlling return path of perturbationINOUTSolution to external EM perturbation

39. 39ShieldingSolution to external EM perturbation

40. 40ShieldingSolution to external EM perturbationUse on cable (power / signal)Design with: aluminium foil braidCaution to the shield connection