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Subtraction in Assembly Example SUB r3 r4 r5 in ARM  Equivalent Subtraction in Assembly Example SUB r3 r4 r5 in ARM  Equivalent

Subtraction in Assembly Example SUB r3 r4 r5 in ARM Equivalent - PDF document

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Uploaded On 2022-08-16

Subtraction in Assembly Example SUB r3 r4 r5 in ARM Equivalent - PPT Presentation

Example in C a b c 0 11 01 1 Example AND r0r1r2 in ARM Equivalent to r0 r1 r2 in C Bitwise OR in Assembly r1 11000111 The result of ANDing these 0000 0000 ID: 936399

arm bits mov shift bits arm shift mov equivalent 0000 assembly lsr logical mvn register 000 asr division x668

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Presentation Transcript

Subtraction in Assembly !!Example: S

UB r3, r4, r5 (in ARM) Equivalent t

o: d = e - f (in C) !Example: !!in

C: a = b * c; !0! 1!!1 0!!1 1!

Example: AND r0,r1,r2 (in ARM) Equi

valent to: r0 = r1 & r2 (in C) "!Bi

twise OR in Assembly r1: 11000111

The result of ANDing these: 0000

0000 0000 0000 0000 1101 1001 1010

Uses for Logical Operators MOV r0

,r1 (in ARM) Equivalent to: a = b

(in ARM) Equivalent to: MVN r0

,#0 (in ARM) Equivalent to: a = -

1 Ð logical shift by n bits Ð mul

tiplication by 2n "!LSR Ð logical sh

ift by n bits Ð unsigned division by

2n "!ASR Ð arithmetic shift by n bi

ts Ð signed division by 2 !Register

Direct: ADD r0, r1, r2; "!With shi

ft/rotate: 1) 0-0xFF Right, 30

bits 0000000000000000000000xxxxxxxx0

0 4-1020 0x4-0x3FC Right, 28 bits 0x

10-0xFF0 Right, 26 bits 0x40-0x3FC0

É É É É Right, 8 bits 1. Register,

optionally with shift operation "!S

hift value can either be: "!Shiftin

g in Assembly Examples: MOV r4, r6,

LSL #4 ; r4 = r6 MOV &#x 4 T;&#xj

ET;&#x Q q;&#x 1 0;&#x 0 1;&#x 64.;

ᦙ 36;.4 ; m B;&#xT 24;&

#x 0 0;&#x 24 ;Ԣ.;٨ ;&#x-2

9.;疙 Tm;&#x /TT;.0 ; T

f;&#x 000;&#x 4 T;&#xj ET;&#x Q q;&#

x 1 0;&#x 0 1;&#x 64.;ᦙ 36;&#x

8.4 ; m B;&#xT 24;&#x 0 0;&#x 24

;Ԣ.;٨ ;&#x-29.;疙 Tm;

&#x /TT;.0 ; Tf;&#x 000;r4,

r6, LSR #8 ; r4 = r6 8 "!Rotating i

n Assembly Examples: MOV r4, r6, ROR

#12 ; r4 = r6 rotated right 12 bit

s " RSB AND, ORR, EOR, BIC MOV, MV

N LSL, LSR, ASR, ROR "!Shifting can

only be done on the second source op

erand "!Constant multiplications pos

sible using shifts and addition/subt

ractions Semicolon (;) is used for

ARM comments !!Registers replace C

variables !!One Instruction (simple

operation) per line !!Simpler is Bet