PPT-Cache Craftiness for Fast Multicore Key-Value Storage

Cache Craftiness for Fast Multicore KeyValue Storage Yandong Mao MIT Eddie Kohler Harvard Robert Morris MIT Lets build a fast keyvalue store KV store systems are important Google Bigtable. Marc De Melo. Outline. Non-Uniform Cache Architecture (NUCA). Cache Coherence. Implementation of directories in multicore architecture. 2. Non-Uniform Cache Architecture [1]. Uniform Cache Architecture. CCGSC. September 15 . 2008. Geoffrey Fox. Community Grids Laboratory. , . School of informatics . Indiana University. gcf@indiana.edu. , . http://www.infomall.org. 2. Gartner 2008 Technology Hype Curve. – . From hardware prospective to software. Presenter: D96943001 . 電子所 陳泓輝. Why Moore’s Law is die. He is not CEO anymore!!. Walls => ILP, Frequency, Power, Memory walls. ILP – more cost less return. Multicores. Minshu. Zhao. Outline. Introduction. Review of Power management technique. Power management in . Multicore. Identify . Multicores. Characteristics. Apply power management technique. Future of . Denny Cherry. mrdenny@mrdenny.com. twitter.com/. mrdenny. About Me. Author or Coauthor of 4 books. 6+ SQL Mag articles. Dozens of other articles. Microsoft MVP since Oct 2008. Microsoft Certified Master. Upon completion of this module, you should be able to:. Configure . SP Networking. Validate . SP Write Cache Configuration. Storage System Configuration and Management. 1. Storage System Configuration and Management. Based heavily on a slide set by Colin Ponce. Rethinking Operating System Designs for a . Multicore World. Multicore computer: A computer with more than one CPU.. 1960-1990. : Multicore existed in mainframes . CCGSC. September 15 . 2008. Geoffrey Fox. Community Grids Laboratory. , . School of informatics . Indiana University. gcf@indiana.edu. , . http://www.infomall.org. 2. Gartner 2008 Technology Hype Curve. Hakim Weatherspoon. CS 3410, Spring 2015. Computer Science. Cornell University. P&H Chapter 2.11, 5.10,. and 6.5. Announcements. HW2 Review Sessions!. TODAY, Tue, . April 21st. , . Hollister B14@7pm. Kaushik Datta. Dissertation Talk. December 4, 2009. Motivation. Multicore revolution has produced wide variety of architectures. Compilers alone fail to fully exploit multicore resources. Hand-tuning has become infeasible. and . Devavrat. Shah. Flowtune. Flowlet. Control for. Datacenter Networks. Response Time: Productivity, Revenue. , Reputation. microservices. . . . develop  network is central. deploy. With a superscalar, we might need to accommodate more than 1 per cycle. Typical server and . m. obile device. memory hierarchy. c. onfiguration with. b. asic sizes and. access times. PCs and laptops will. Direct-mapped caches. Set-associative caches. Impact of caches on performance. CS 105. Tour of the Black Holes of Computing. Cache Memories. C. ache memories . are small, fast SRAM-based memories managed automatically in hardware. Outcome of Amsterdam Jamboree. Andrea Sciabà. Réunion. des sites LCG-France. 24-25 June, CPPM Marseille. Introduction. Held in Amsterdam. Two and a half days. 100 attendees. 30 presentations. http://indico.cern.ch/event/92416.