PPT-A Case for Refresh Pausing in DRAM Memory Systems

Author : pasty-toler | Published Date : 2016-12-09

Prashant Nair ChiaChen Chou Moinuddin Qureshi 1 Dynamic Random Access Memory DRAM used as main memory DRAM stores data as charge on capacitor Leakage DRAM cells

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A Case for Refresh Pausing in DRAM Memory Systems: Transcript

Prashant Nair ChiaChen Chou Moinuddin Qureshi 1 Dynamic Random Access Memory DRAM used as main memory DRAM stores data as charge on capacitor Leakage DRAM cells leak data DRAM Chip 1. edu Abstract Dynamic randomaccess memory DRAM is the building block of modern main memory systems DRAM cells must be periodically refreshed to prevent loss of data These refresh operations waste energy and degrade system performance by interfering wi by Parallelizing Refreshes. with Accesses. Donghyuk. Lee, . Zeshan. . Chishti. , . Alaa. . Alameldeen. , Chris Wilkerson, . Yoongu. Kim, . Onur. . Mutlu. Kevin Chang. Executive Summary. DRAM . refresh interferes with memory accesses. Niladrish. . Chatterjee. Manjunath. . Shevgoor. Rajeev . Balasubramonian. Al Davis. Zhen Fang. ‡†. Ramesh . Illikkal. *. Ravi . Iyer. *. University of Utah , NVidia. ‡. and Intel Labs*. †. Yoongu Kim. Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, . Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu. DRAM Disturbance Errors. DRAM Chip. Row of Cells. Row. Row. Row. Row. Wordline. Prashant. Nair. Chia-Chen Chou . Moinuddin Qureshi. 1. Dynamic Random Access Memory (DRAM) used as main memory. DRAM stores data as charge on capacitor. Leakage. DRAM cells leak data!. DRAM Chip. 1. Bank Privatization for Predictability and Temporal Isolation. Sungjun. . Kim . Columbia . University. Edward A. Lee . UC . Berkeley . Isaac . Liu . UC Berkeley. Hiren. D. Patel University of Waterloo. Flexible Auto - Refresh : - E fficient DRAM Refresh Reductions Ishwar Bhati * , Zeshan Chishti DRAM Scaling. Prof. Onur Mutlu. http://www.ece.cmu.edu/~omutlu. onur@cmu.edu. HiPEAC. ACACES Summer School 2013. July 15-19, . 2013. The Main Memory System. Main memory is a critical component of all computing systems. Montek Singh. Oct 24, . 2016. Topics. Previous lecture on memories:. Read-Only Memories (ROMs). Static. Random-Access. . Memory (SRAM). Today:. Dynamic. Random. -Access . Memory (DRAM). 2. Dynamic . Thread-to-Rank Assignment. Manjunath Shevgoor, Rajeev Balasubramonian, . University of Utah. Niladrish Chatterjee, . NVIDIA . Jung-Sik Kim, . Samsung Electronics. 4/18/2016. Addressing Service Interruptions in Memory with Thread to Rank Assignment. Xianwei Zhang. Youtao. Zhang (advisor). CS, Pitt. Bruce R. Childers. CS, Pitt. Wonsun. . Ahn. CS, Pitt. Jun Yang. ECE, Pitt. Guangyong. Li. ECE, Pitt. Committees: . PhD Thesis . Defense. Jul 14, 2017 (Friday). Secure Runtimes. Ben . Zorn. Research in Software Engineering (. RiSE. ). Microsoft Research. In collaboration . with:. Emery Berger and Gene Novark, . UMass - Amherst. Ted Hart and Karthik Pattabiraman, . Prof. Onur Mutlu. ETH Zürich. Fall 2019. 27 September 2019. Solving the Memory Problem. Fix it. : Make memory and controllers more intelligent. New interfaces, functions, architectures. : system-. mem.

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