PPT-TRILL DC Interconnect

Author : sherrill-nordquist | Published Date : 2017-10-28

draftbalajil2vpntrilloveripmultilevel02txt Balaji Venkat Venkataswami Ramasubramani Mahadevan Shivakumar Sundaram Narayana Swamy Perumal Bhargav Bhikkaji DELLForce10

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TRILL DC Interconnect: Transcript


draftbalajil2vpntrilloveripmultilevel02txt Balaji Venkat Venkataswami Ramasubramani Mahadevan Shivakumar Sundaram Narayana Swamy Perumal Bhargav Bhikkaji DELLForce10 Architecture Considered. 9 10 11 12 13 12481632 Performance normalized to 1MB LLC size MB 04 06 08 10 0 64 128 192 256 Percore Performance normalized to 1 core Number of cores 64 128 192 256 0 64 128 192 256 Chip Performance normalized to 1 core Number of cores brPage 4br br . Hao. Yizhou. Li. Donald Eastlake . Analysis of Active-Active connection solutions. . draft-hao-trill-analysis-active-active-01. March 2014. 1. Introduction. Trill Campus. RB1. RB2. RB3. CE1. CE2. Proposal. Bob Ross, . Teraspeed. Labs. bob@teraspeedlabs.com. EPEPS 2015 IBIS Summit. San Jose, CA, October 28. , 2015. Draft Presented September 2, 2015 at the Interconnect Working Group. Copyright 2015 . draft-eastlake-trill-rbridge-bfd-00.txt. Donald E. Eastlake 3. rd. 155 Beaver Street. Milford, MA 01757 USA. <d3e3e3@gmail.com>. November 2010. 1. TRILL OAM & BFD. Vishwas. . Manral. IP Infusion. Transparent Interconnection of Lots of Links. Donald E. Eastlake, 3. rd. Co-Chair, TRILL Working Group. Principal Engineer, Huawei. d3e3e3@gmail.com. April 2013. 1. TRILL - SVC COMSOC. Donald E. . Eastlake, . 1. Tissa. . Senevirathne. (Cisco). tsenevir@cisco.com. new-senevirathne-trill-oam-liaison-0114-v01. 1/17/14. Motivation. Common OAM architecture and protocol suite between SDOs. Not limited to TRILL, but potential use in other overlay protocols. OAM. between IEEE 802.1 and . IETF. /TRILL. Tissa Senevirathne. Donald Eastlake. September, 2012. Re-cap from San Diego to Santa Cruz. We presented high-level goal of the effort. i.e. to create a common . . . DIVYA CHALLA. INTRODUCTION. INTERCONNECTS . connect the electronic circuits on a chip for proper functionality of the IC.. Interconnects can be . Local. . (connections within transistors) or . AXI4-Stream Interconnect v1.1www.xilinx.com PG035 November 18, 2015 Table of ContentsChapter1:OverviewFeature Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Requirements. Chen Zhao, Frank Yang. NetApp, Inc.. Storage Interconnect Requirements. Multi-destination RMA operation with reliable unconnected transport. 2. www.openfabrics.org. Storage Interconnect Requirements. OAM. IEEE . 802.1 Meeting . San Diego. July . 16. th. -20. th. , 2012. b. y. Tissa Senevirathne. Donald Eastlake 3. rd. Objective. Explore complementary . OAM. model between IEEE 802.1 and . IETF. /TRILL. November 2013. 1. Updates. Requirements document is now RFC 6905. Framework document cleared WG last call.. Fault management document is a WG document. Performance management document adopted as WG document. 802.1 and TRILL. November, 2012. 2. C-Component. End Station . VLAN. Processing. ISS. /802.3 Processing . TRILL. (. DA,SA,M1. ). (. DA,SA. , V, . M2. ). (T, V, DA, SA, D). RBridge. 1. 2. 3. Native port. Radia. Perlman . Fangwei. . Hu. Donald Eastlake 3rd . Kesava. . Vijaya. . Krupakaran. . Ting Liao. Problem statement. 2013-11-5 Tuesday. 2. Smart Endnode. RB1. RB2. RB3. E1. E2. E3. SW 1. TRILL Campus.

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