PPT-ReVive : Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessor

Milos Prvulovic Zheng Zhang Josep Torrellas University of Illinois at UrbanaChampaign HewlettPackard Laboratories Isaac Liu Introduction Targeting large scale applications that provide . : Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors. Milos. . Prvulovic. , . Zheng. Zhang, . Josep. . Torrellas. University of Illinois at Urbana-Champaign. CS448. 2. What is Cache Coherence?. Two processors can have two different values for the same memory location. Write Through Cache. 3. Terminology. Coherence. Defines what values can be returned by a read. A Complete GPU Compute Architecture by NVIDIA. Tamal. . Saha. , . Abhishek. . Rawat. , Minh Le. {ts4rq, ar8eb, ml4nw}@. virginia.edu. GPU Computing. Unprecedented FP performance. Ideal for data parallel applications. Håkon Kvale . Stensland. iAD-lab, Department for Informatics. Basic 3D Graphics Pipeline. Application. Scene Management. Geometry. Rasterization. Pixel Processing. ROP/FBI/Display. Frame. Buffer. Memory. Sequential consistency, the most intuitive model, is not practically implementable due to concomitant performance penalties compared to other relaxed memory models.. Reactive SC . classifies memory accesses into safe and unsafe types and relaxes consistency constraints for safe accesses.. Maurice Herlihy (DEC), J. Eliot & B. Moss (UMass). Presenter: Mariano Diaz. CS 5204 – Fall, 2009. Part 1: Concepts and Hardware-based Approaches. Introduction. What’s a transaction?. Transaction: a finite sequence of machine instructions, executed by a single process, that satisfies the following:. Simon Cho. Who . am I?. Simon Cho. Blog : Simonsql.com. Email : . Simon@simonsql.com. All Presentation and script will be on My . blog.. This is my first presentation in Public.. Question 1.. BEGIN. . Chapter 12: Multiprocessor Architectures Schaum with Approximate Loads. Georgia Institute of Technology. Carnegie Mellon University. Hadi. . Esmaeilzadeh. . Onur. . Mutlu. Todd . Mowry. Bradley. . Thwaites. Gennady. . Pekhimenko. Amir . Yazdanbakhsh. Companion slides for. The Art of Multiprocessor Programming. by Maurice Herlihy & Nir Shavit. Art of Multiprocessor Programming. 2. A Shared Pool. Put. Insert item. block if full. Remove. Remove & return item. . Multiprocessors. Interconnection. . Structures. Interprocessor. . Arbitration. Interprocessor Communication and. . Synchronization. Cache. . Coherence. Shared. . multiprocessors. Characteristics . Recall: Microprocessors are classified by how memory is organized. Tightly-coupled multiprocessor systems use the same memory. They are also referred to as . shared memory multiprocessors. .. The processors do not necessarily have to share the same block of physical memory: . Chapter 13. Anh Huy Bui. Jason Wiggs. Hyun Seok Roh. 1. Introduction . Rollback recovery protocols. restore the system back to a consistent state after a failure. achieve fault tolerance by periodically saving the state of a process during the failure-free execution . with Approximate Loads. Georgia Institute of Technology. Carnegie Mellon University. Hadi. . Esmaeilzadeh. . Onur. . Mutlu. Todd . Mowry. Bradley. . Thwaites. Gennady. . Pekhimenko. Amir . Yazdanbakhsh.