Transistors amp Logic II Montek Singh Nov 1 2017 Lecture 10 Todays Topics Basic gates Boolean algebra Synthesis using standard gates Truth tables Universal gates NAND and NOR Gates with more than 2 inputs ID: 759690 Download Presentation
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Transistors & Logic - II. Montek Singh. Nov 1, 2017. Lecture . 10. Today’s Topics. Basic gates. Boolean algebra. Synthesis using standard gates. Truth tables. Universal gates: NAND and NOR. Gates with more than 2 inputs.
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Computer Organization and Design
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Computer Organization and DesignTransistors & Logic - II
Nov 1, 2017
Basic gatesBoolean algebraSynthesis using standard gatesTruth tablesUniversal gates: NAND and NORGates with more than 2 inputsSum-of-ProductsDeMorgan’s Law
Single-Input Logic Gates
Two-Input Logic Gates
More Two-Input Logic Gates
Multiple-Input Logic Gates
Multiple-Input Logic Gates
Basic gates vs. single CMOS gates
Not all basic gates can be implemented using a single CMOS gate
Some can be
inverter, NAND, NOR
we have covered their CMOS implementation
Others need multiple CMOS gates connected together
AND: implemented as NAND + inverter
OR: implemented as NOR + inverter
buffer: implemented as inverter + inverter
XOR / XNOR: will see shortly
Algebra of 1s and 0s
Table of Identities
Left and right columns are dualsReplace ANDs and ORs, 0s and 1s
Single Variable Identities
Operation is independent of order of variables
Independent of order in which we groupSo can also be simply written as:X+Y+Z, andXYZ
Can substitute arbitrarily large algebraic expressions for the variablesDistribute an operation over the entire expressionExample: X + YZ = (X+Y)(X+Z) Substitute ABC for X ABC + YZ = (ABC + Y)(ABC + Z)
Used a lotNOR invert, then ANDNAND invert, then OR
Truth Tables for DeMorgan’s
DeMorgan’s Thm.: “Bubble Pushing”
Bubble pushing:imagine the bubble at the output is being pushed towards the inputsit becomes a bubble at every input, andthe shape of the gate changes from AND to OR, and vice versa
Apply algebraic and Boolean identities to simplify expressionExample:
From Truth Table to Gate-Level Circuit
Start with Functional Spec
We need to start somewhereusually it’s the functional specification
If C is 1 then
copy B to Y,
A to Y
First step is to translate a verbal description into a tabular form. Any combinational function can be represented as a
”A truth table lists the output(s) for each combination of inputs.
We Can Make Most Gates Out of Others
Example 1: B > AOutput Y is 1 if and only if B is 1 AND A is 0 Y = B AND (NOT(A))
We Can Make Most Gates Out of Others
Example 2: A XOR BOutput Y is 1 if and only if …B is 1 AND A is 0 --OR—B is 0 AND A is 1 Y = B AND (NOT(A)) OR A AND (NOT(B))
Symbol for XOR
How many gates do we really need?
One Will Do!
NANDs and NORs are universalone can make any circuit out of just NANDs, or out of just NORs!
Gates with more than two inputs
Sometimes can be directly created in CMOSe.g., 3-input NOR, 4-input NAND etc.Often constructed using smaller gates:e.g., N-input AND gate using several 2-input AND gates AND(A0, A1, A2 … AN-1) = AND … (AND(AND(A0, A1), A2) … AN-1)Delay in computing final output is linear in # of gates: O(N)can we do it faster?
Gate trees are faster
More parallelism: combine two at a time in parallelmuch like a tournament bracket!
Delay is now
Given truth table:
Develop Boolean equation
Design Approach: Sum-of-Products
Three steps:Write functional spec as a truth tableWrite down a Boolean expression forevery row with ‘1’ in the outputan input that is ‘0’ becomes invertedAND all the inputs in each termWire up the gates!This approach give us expressions of the type:SUM-OF-PRODUCTS (“SOP”)Boolean “SUM” actually means ORBoolean “PRODUCT” actually means AND
We can implement SUM-OF-PRODUCTS……with just three levels of logic:INVERTERS/AND/OR
Symbols and Boolean operators:
An Interesting 3-Input Gate: Multiplexer
Based on C, select the A or B input to be copied to the output Y.