Presented By Akram Ahmed Date 19 November 2014 CMPE 691 Digital Signal Processing Hardware Implementation Outline Filter Design Window Design Complex Number Absolute Value Calculation ID: 283947
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Slide1
Final Project Overall Design
Presented By: Akram Ahmed Date: 19 November 2014
CMPE
691: Digital Signal Processing Hardware ImplementationSlide2
Outline
Filter DesignWindow DesignComplex Number Absolute Value CalculationCity Distance
Spectral Density DesignFFT Latency and selectionOverall DesignSlide3
Filter Design
Number of Taps: 201Max Filter Coeff = 0.774121
Min Filter Coeff Value = -0.181664Coeff representation = 1.9, signed 2’s complimentSlide4
Window Design
Max Window Coeff = 1Min Window Coeff
Value = 0.000003 (non-zero)Coeff representation = 1. 9, unsigned Slide5
Combined Filter and WindowSlide6
Spectral DensitySlide7
FFT
Number of Inputs: 1024Target Design Frequency: 50 MHz (20ns)FFT Latency = FFT calculation time + drain timeFor Radix 2 lite
FFT Latency = 246.360 s + 1024 * 20 ns = 0.26648 msFor Radix
2 Burst I/O
FFT Latency = 146.680
s + 1024 * 20 ns =
0.16716ms
For Radix 4 Burst I/O
FFT Latency = 68.620
s + 1024 * 20 ns =
0.0891ms
For Pipeline Streaming
FFT Latency = 43.120
s + 1024 * 20 ns =
0.0636msSlide8
Overall DesignSlide9
Overall DesignSlide10
FIR IP CoreSlide11
FIR IP CoreSlide12
FIR IP CoreSlide13
FIR SimulationSlide14
FIR SimulationSlide15
FIR Matlab
f =
fopen ('
filtInp
','w');
filtLen
= length(y1);
for
i
= 1:1:filtLen
nonF
= fi(y1(
i
),1,16,0);
fprintf
(
f,'%s
,\n',
nonF.bin
);
fix =
strcat
(nonF.bin,'.0');
y1(
i
) = fix2dec(fix);
endSlide16
FIR Simulated output and Matlab
comp.Slide17
FIR inputSlide18
Overall Design