PDF-SN SNLSA SN SNLSA DUAL JK FLIPFLOPS WITH PRESET AND CLEAR SDLS DECEMBER REVISED MARCH

Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN5476 SN54LS76A SN7476 SN74LS76A DUAL JK FLIPFLOPS WITH PRESET AND CLEAR. Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN54LS673 SN54LS674 SN74LS673 SN74LS674 16BIT SHIFT REGISTERS SDLS195 MA Products conform to specifications per the terms of Te xas Instruments standard warranty Production processing does not necessarily include testing of all parameters BW 87223 dB 70 MHz Matched 05dB Attenuators for Contrast Control Three Externall Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN54LS381A SN54S381 SN74LS381A SN54LS382A SN74LS382A SN74S381 ARITHMETIC Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN5476 SN54LS76A SN7476 SN74LS76A DUAL JK FLIPFLOPS WITH PRESET AND CLEAR These dual flipflops are designed so that when the clock goes HIGH the inputs are enabled and data will be accepted The Logic Level of the J and K inputs will perform according to the Truth Table as long as mini mum setup times are observed Input da The strobe G input must be at a low logic level to enable the data selectionmultiplexing function A high level at the strobe terminal forces the W output high and the Y output low The SN54F151B is characterized for operation over the full military The AS850A has a clockcontrolled select register allowing for a symmetrical presentation of the select inputs to the decoder while the AS851B has an enablecontrolled select register allowing the user to select and hold one particular data line A buf 15 CP 0 15 CG 0 15 CO 1 2 4 8 This symbol is in accordance with ANSIIEEE Std 911984 and IEC Publication 61712 4 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A B GND GND GND GND CC CC S0 S1 S2 S3 DW PACKAGE TOP VIEW EPIC is a trademark Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN5491A SN54LS91 SN7491A SN74LS91 8BIT SHIFT REGISTERS SDLS126 MARCH 197 Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN54LS292 SN54LS294 SN74LS292 SN74LS294 PROGRAMMABLE FREQUENCY DIVIDERSDI Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN54122 SN54123 SN54130 SN54LS122 SN54LS123 SN74122 SN74123 SN74130 SN74L Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN5446A 47A 48 SN54LS47 LS48 LS49 SN7446A 47A 48 SN74LS47 LS48 LS49 BCDTO Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters brPage 2br SN54190 SN54191 SN54LS190 SN54LS191 SN74190 SN74191 SN74LS190 SN74LS191 S The strobe G input must be at a low logic level to enable the data selectionmultiplexing function A high level at the strobe terminal forces the W output high and the Y output low The SN54F151B is characterized for operation over the full military