PPT-DRAM MARKET UPDATE September

Author : sherrill-nordquist | Published Date : 2018-11-22

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DRAM MARKET UPDATE September: Transcript

2014 9302014 2014 DE DIOS amp ASSOCIATES ALL RIGHTS RESERVED Reproduction prohibited without prior permission 1 Strange situation demand is weakening while supply remains tight Weakening PCDRAM demand and supply mix issues in 2H14. Niladrish. . Chatterjee. Manjunath. . Shevgoor. Rajeev . Balasubramonian. Al Davis. Zhen Fang. ‡†. Ramesh . Illikkal. *. Ravi . Iyer. *. University of Utah , NVidia. ‡. and Intel Labs*. †. Webinar . August 18, 2015. 10:00-11:00am. To access this meeting by voice, please dial 888-537-7715, . participant code . 52045398. #. Today’s. . Agenda. W. elcome . and I. ntroductions. Finance Update. Nikhil Nichani. Francis Perez. Business Summary. Micron Technology, based in Boise, Idaho, engages in manufacturing and marketing of semiconductor devices worldwide. The company’s product line include Dynamic Random Access Memory(DRAM), Solid-State Drive(SSD), and Flash Memory(NAND and NOR). Micron’s products are used in many electronic applications such as personal computers, memory cards, mobile phones, USB storage devices, digital cameras, and MP3 players. Micron has assembling facilities in the United States, Asia, Middle-East, and Europe, and is a major player in the international markets with strong sales in China. In May, 2010, Micron completed the acquisition of . 04/06/2015. 1. MCWG update to WMS. Joint meeting of MCWG and CWG on Tuesday, March 10. th. 4. NPRRs reviewed for credit impacts by email vote. 3. NPRRs were operational and had no credit impact. 1 NPRR, NPRR683, impacts credit. Jaewoong. . Sim. *, Gabriel H. Loh. +. , Vilas Sridharan. #. , Mike O’Connor. +. June . 2013 . *Georgia Tech. +. AMD Research. #. AMD RAS Architecture. Die-stacked Memory. Die-stacking is coming along, esp. DRAM. Niladrish. . Chatterjee. Manjunath. . Shevgoor. Rajeev . Balasubramonian. Al Davis. Zhen Fang. ‡†. Ramesh . Illikkal. *. Ravi . Iyer. *. University of Utah , NVidia. ‡. and Intel Labs*. †. Kshitij. Sudan. , . Niladrish. . Chatterjee. , David . Nellans. , Manu . Awasthi. , Rajeev . Balasubramonian. , Al Davis. School of Computing, University of Utah. ASPLOS-2010. DRAM Memory Constraints. DRAM Scaling. Prof. Onur Mutlu. http://www.ece.cmu.edu/~omutlu. onur@cmu.edu. HiPEAC. ACACES Summer School 2013. July 15-19, . 2013. The Main Memory System. Main memory is a critical component of all computing systems. Access Locality. Hasan Hassan,. Gennady . Pekhimenko. , . Nandita Vijaykumar, . Vivek. . Seshadri. , Donghyuk Lee, Oguz Ergin, . Onur. . Mutlu. Executive Summary. Goal. : . Reduce average DRAM access latency with no modification to the existing DRAM chips. 2014. 11/21/2014. © 2014 DE DIOS & ASSOCIATES. ALL RIGHTS RESERVED. Reproduction prohibited without prior permission.. 1. DRAM market entering a new phase – a more “normal” market – in 2015. by Exploiting the Variation in Local . Bitlines. . Jeremie S. Kim. . Minesh. Patel . Hasan Hassan . Onur. . Mutlu. . Motivation. : DRAM latency is a . major performance bottleneck. Problem. Unclonable. Functions . by Exploiting the Latency-Reliability Tradeoff . in Modern Commodity DRAM Devices. Jeremie. S. Kim. . Minesh. Patel . Hasan Hassan . . Onur. . Mutlu. . Motivation. Vivek Seshadri. Thomas Mullins, . Amirali. . Boroumand. , Onur Mutlu, . Phillip B. . Gibbons, Michael A. Kozuch, . Todd C. Mowry. Executive summary. Problem: Non-unit . strided. accesses. Present in many applications.

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