Chapter 2: Basics of Computer Architecture Smruti

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Chapter 2: Basics of Computer Architecture Smruti R Sarangi IIT Delhi 1 (c) Smruti R. Sarangi, 2023 Outline of this Chapter 2 (c) Smruti R. Sarangi, 2023 Design of a Modern Multicore Chip Caches Main memory 4-64 cores Hierarchy of caches

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01
Chapter 2: Basics of Computer Architecture Smruti R Sarangi
IIT Delhi 1 (c) Smruti R. Sarangi, 2023<br>
02
Outline of this Chapter 2 (c) Smruti R. Sarangi, 2023<br>
03
Design of a Modern Multicore Chip Caches Main memory 4-64 cores
Hierarchy of caches
1st level: i-cache and d-cache
2nd level: L2 cache (MBs)
3rd level: L3 cache (MBs)
Off-chip main memory 3 (c) Smruti R. Sarangi, 2023<br>