NOCs: Past, Present and Future Ahmed Hemani
Description: NOCs: Past, Present and Future Ahmed Hemani Professor, Dept. Of Electronics, School of ICT, KTH, Stockholm Sweden Email: hemanikth.se 1 2 The Promise of NOC Enable Billion Gate ASICs Make them affordable 3 Exponentially Reduce the VLSI
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slide1. NOCs: Past, Present and Future Ahmed Hemani
Professor, Dept. Of Electronics, School of ICT, KTH, Stockholm Sweden
Email: hemani@kth.se 1<br>
slide2. 2 The Promise of NOC Enable Billion Gate ASICs Make them affordable<br>
slide3. 3 Exponentially Reduce the VLSI Design Space Automation RTL Physical Design Platform Boolean Level Physical Design Platform Auotmated
One Time<br>
slide4. 4 Synchronicity Synchoricity Syn + Choros (space in Greek)<br>
slide5. SiLago Blocks m-architecture Level Physical Design SiLago: Silicon Large Grain Object 5<br>
slide6. 6 Composition by Abutment Regional / Local NOCs Without NOCs and Synchoricity
The compostion by abutment scheme
Would be impractical This policy is applied to
Clock, Reset and Power Grid as well<br>
slide7. 7 NOC/CGRAs + Synchoricity Enables Composition By Abutment No further VLSI Engineering Needed<br>
slide8. 8 SiLago Design Instances = Region Instances System
Controller Program
Memory Ethernet PLL/CGU
PMC Data
Memory Interrupt Ctrl Dynamically Reconfigurable
Resource Array
DRRA<br>
slide9. 9 NOCs are key enablers of Composition by Abutment for DSE SiLago Physical Design Platform Design
Instance 1 Design
Instance 2 . . . VLSI Designs
Composition By Abutment SiLago Physical Design Platform Design Space Exploration<br>
slide10. 10 One VLSI Design Instance generated by Abutting SiLago Blocks<br>
slide11. 11 NOCs are multi-layer clustering agents for DSE SiLago Physical Design Platform Design
Instance 1 Design
Instance 2 Implementation
Alternative 1 Implementation
Alternative 2 . . . VLSI Designs
Composition By Abutment Coarse Grain
Reconfiguration SiLago Physical Design Platform Design Space Exploration . . . LSTM Model in MATLAB<br>
slide12. 12 SiLago vs. Standard Cell Based ASIC Design Flow Area Energy 30-50% Area Overhead
10-30% Energy Overhead
In some cases SiLago beats ASIC in energy<br>
slide13. SiLago Enables Automation of Highly Efficient Custom Design 3 kW 12 Watts eBrain II@KTH 13 SiLago
Enables design automation of such high performance custom computing machines Biological Plausible Model of Cortex: ~1 PetaFlops,
40 TBs Synaptic Weights at 140 TBs/s bandwidth<br>
slide14. The Impact Software Centric / GPU + Processor
Based Designs Hardware Centric
SiLago Based Designs 1000 X 1000 X<br>
Professor, Dept. Of Electronics, School of ICT, KTH, Stockholm Sweden
Email: hemani@kth.se 1<br>
slide2. 2 The Promise of NOC Enable Billion Gate ASICs Make them affordable<br>
slide3. 3 Exponentially Reduce the VLSI Design Space Automation RTL Physical Design Platform Boolean Level Physical Design Platform Auotmated
One Time<br>
slide4. 4 Synchronicity Synchoricity Syn + Choros (space in Greek)<br>
slide5. SiLago Blocks m-architecture Level Physical Design SiLago: Silicon Large Grain Object 5<br>
slide6. 6 Composition by Abutment Regional / Local NOCs Without NOCs and Synchoricity
The compostion by abutment scheme
Would be impractical This policy is applied to
Clock, Reset and Power Grid as well<br>
slide7. 7 NOC/CGRAs + Synchoricity Enables Composition By Abutment No further VLSI Engineering Needed<br>
slide8. 8 SiLago Design Instances = Region Instances System
Controller Program
Memory Ethernet PLL/CGU
PMC Data
Memory Interrupt Ctrl Dynamically Reconfigurable
Resource Array
DRRA<br>
slide9. 9 NOCs are key enablers of Composition by Abutment for DSE SiLago Physical Design Platform Design
Instance 1 Design
Instance 2 . . . VLSI Designs
Composition By Abutment SiLago Physical Design Platform Design Space Exploration<br>
slide10. 10 One VLSI Design Instance generated by Abutting SiLago Blocks<br>
slide11. 11 NOCs are multi-layer clustering agents for DSE SiLago Physical Design Platform Design
Instance 1 Design
Instance 2 Implementation
Alternative 1 Implementation
Alternative 2 . . . VLSI Designs
Composition By Abutment Coarse Grain
Reconfiguration SiLago Physical Design Platform Design Space Exploration . . . LSTM Model in MATLAB<br>
slide12. 12 SiLago vs. Standard Cell Based ASIC Design Flow Area Energy 30-50% Area Overhead
10-30% Energy Overhead
In some cases SiLago beats ASIC in energy<br>
slide13. SiLago Enables Automation of Highly Efficient Custom Design 3 kW 12 Watts eBrain II@KTH 13 SiLago
Enables design automation of such high performance custom computing machines Biological Plausible Model of Cortex: ~1 PetaFlops,
40 TBs Synaptic Weights at 140 TBs/s bandwidth<br>
slide14. The Impact Software Centric / GPU + Processor
Based Designs Hardware Centric
SiLago Based Designs 1000 X 1000 X<br>