Bit High Speed Multiplying DA Converter Universal Digital Logic Interface DAC Rev
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Bit High Speed Multiplying DA Converter Universal Digital Logic Interface DAC Rev

C In fo rmation furn ished by An alog D s is believed to be accurate and reliable How ver n resp on sibili ty is assume d b A alog De vices fo r its use nor for an y fri geme nt s of p nt s or ot r ri ght o th ird parties th at may result fro its us

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Bit High Speed Multiplying DA Converter Universal Digital Logic Interface DAC Rev




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Presentation on theme: "Bit High Speed Multiplying DA Converter Universal Digital Logic Interface DAC Rev"β€” Presentation transcript:


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8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) DAC08 Rev. C In fo rmation furn ished by An alog D s is believed to be accurate and reliable. How ver, n resp on sibili ty is assume d b A alog De vices fo r its use, nor for an y fri geme nt s of p nt s or ot r ri ght o th ird parties th at may result fro its use Specifications subjec t to chan witho t tice. No licen e is g an te by implicati n or ot herwi e u der a y p nt or p nt ri ghts of Analog De ces. Trademarks an registered tra ema ks are the prop erty their respective ow ners. One

Technolog Way, P.O Box 9106, Norwood, MA 02062-9106, U.S.A. l: 781. 329. 700 www.analog.com Fax: 781. 326. 87 03 2004 Analog De vices, I c. Al l r ght r ser ed FEATURES Fast settling o tput current: 85 ns Full-scal e curre nt prematched to 1 LSB Direct interfac e to TTL, CMOS, ECL, HTL, PM OS Nonlinearity to 0.1% maxim m over temper ature range High o tput im pedance and c mpliance: −10 V to +18 V Complementary current outp uts Wide range multiplying ca pability: 1 MHz bandwidth Low FS cu rrent drift: 10 ppm/C Wide po wer su pply range: 4. V to 18

V Low power con umption: 33 mW @ 5 V Low cost GENERAL DESCRIPTION The D C08 s es o 8-b t noli thic dig tal-to-a nalog co er ers p ide v hig d p ma e co le d w lo w cost nd o tst ing a plic io ns f exi nc c rc d a 8 ns s tt ng t me w ve lo w li e a d a lo w p r co io n. M nic ly in g p ma e is a in o er a w 20-t -1 re fe re nc c r nge. tc ng to 1 b fer e an d f -s cal c en ts e imina es t e fo r f e in m st a plic io . Dir in ace l la r log c fami lies wi f is e im ty is p ide th h sw g, a le th sh logi c in t. volt age c c me ar c out ut are id , cr sin vers a nd ena di er en era ion t

ef fe y doub le e o-p o s g. In m app at t ou tpu c d re c t e wi ou t e fo r a ext al o a Al l D C08 m g ar an te f 8 monoton an non es as t t as .1% o er t e e o era in g era ur e ra e a a D vi p manc e is y cha ge d er th e 4.5 V 18 V p r ra wi th 33 mW r co pt io n a ina a 5 V su lies. Th e co act siz a d lo w p co um n mak e C08 at f p a m ap at de vices p ess d t MIL D-883, L B a e a lab C08 a ic io in ude 8-b t, 1 s A/D con er rs, s o to and p n dr ers, w vefo ge to rs, dio e co ders a s, a alog m r dr er s, p ogra le p r su lies, LC D d spla dr ers, h sp

d de , an d o ap at l c h s a c mp in t/o ut v rs a e r quir . FUNC TI ON BL OCK DI M REF (+) 14 15 V+ LC (MSB) B1 B2 B3 B4 B5 B6 B7 (LSB) B8 13 10 11 12 V COMP 16 OUT OUT BIAS NETWORK CURRENT SWITCHES REF ( REFERENCE AMPLIFIER DAC08 Fi 1
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DAC08 Rev. C | Page 2 of 20 TABLE OF CONTENTS Specifications ..................................................................................... 3 Electrical Characteristics ............................................................. 3 Typical Electrical Characteristics ............................................... 4 Absolute Maximum

Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Connections ............................................................................... 6 Test and Burn-In Circuits ................................................................ 7 Typical Performance Characteristics ............................................. 8 Basic Connections .......................................................................... 11 Application Information

................................................................ 13 Reference Amplifier Setup ........................................................ 13 Reference Amplifier Compensation for Multiplying Applications ................................................................................ 13 Logic Inputs ................................................................................. 13 Analog Output Currents ........................................................... 14 Power Supplies ............................................................................ 14 Temperature

Performance ......................................................... 14 Multiplying Operation ............................................................... 14 Settling Time ............................................................................... 14 ADI Current Output DACs ........................................................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 18 REVISION HISTORY 11/04—Rev. B to Rev. C Changed SO to SOIC

.........................................................Universal Removed DIE ......................................................................Universal Changes to Figure 30, Figure 31, Figure 32................................. 12 Change to Figure 33 ....................................................................... 15 Added Table 4.................................................................................. 16 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide

.......................................................... 18 2/02—Rev. A to Rev. B Edits to SPECIFICATIONS............................................................. 2 Edits to ABSOLUTE MAXIMUM RATING ................................ 3 Edits to ORDERING GUIDE.......................................................... 3 Edits to WAFER TEST LIMITS...................................................... 5 Edit to Figure 13 ............................................................................... 8 Edits to Figures 14 and 15 ............................................................... 9


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DAC08 Rev. C | Page 3 of 20 SPECIFICATIONS ELECTRICAL CHARACTERISTICS = 15 V, I REF = 2.0 mA, –55C ≤ T ≤ +125C for DAC08/DAC08A, 0C ≤ T ≤ +70C for DAC08E and DAC08H, −40C to +85C for DAC08C, unless otherwise noted. Output characteristics refer to both I OUT and OUT . Table 1. DAC08A/DAC08H DAC08E DAC08C Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit Resolution 8 8 8 Bits Monotonicity 8 8 8 Bits Nonlinearity NL 0.1 0.19 0.39 %FS Settling Time To

1/2 LSB, all bits switched on or off, = 25C 85 135 85 150 85 150 ns Propagation Delay Each Bit PLH = 25C 35 60 35 60 35 60 ns All Bits Switched PHL 35 60 35 60 35 60 ns Full-Scale Tempco TCI FS 10 50 10 80 10 80 ppm/C DAC08E 50 Output Voltage Compliance OC Full-scale current (True Compliance) Change <1/2 LSB, R OUT > 20 MΩ typ −10 +18 −10 +18 –10 +18 V Full Range Current FR4 REF = 10.000 V R14, R15 = 5.000 kΩ T = 25C 1.984 1.992 2.000 1.94 1.99 2.04 1.94 1.99 2.04 mA Full Range

Symmetry FRS FR4 − I FR2 0.5 4 1 8 2 16 A Zero-Scale Current ZS 0.1 1 0.2 2 0.2 4 A Output Current Range OR1 R14, R15 = 5.000 k 2.1 2.1 2.1 mA OR2 REF = +15.0 V, V− = −10 V REF = +25.0 V, 4.2 4.2 4.2 mA V− = −12 V Output Current Noise REF = 2 mA 25 25 25 nA Logic Input Levels Logic 0 IL LC = 0 V 0.8 0.8 0.8 V Logic 1 IL 2 2 2 V Logic Input Current LC = 0 V Logic 0 IL IN = −10 V to +0.8 V −2 −10 −2 −10 −2 −10 A Logic 1 IH IN = 2.0 V to 18 V 0.002 10

0.002 10 0.002 10 A Logic Input Swing IS V− = −15 V −10 +18 −10 +18 −10 +18 V Logic Threshold Range THR = 15 V −10 +13.5 −10 +13.5 −10 +13.5 V Reference Bias Current 15 −1 −3 −1 −3 −1 −3 A Reference Input dI/dt EQ = 200 4 8 4 8 4 8 mA/s Slew Rate = 100 C = 0 pF. See Figure 7. Power Supply Sensitivity PSSI FS+ V+ = 4.5 V to 18 V 0.0003 0.01 0.0003 0.01 0.0003 0.01 %I /%V+ PSSI FS V− = −4.5 V to −18 V

0.002 0.01 0.002 0.01 0.002 0.01 %I /%V REF = 1.0 mA
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DAC08 Rev. C | Page 4 of 20 DAC08A/DAC08H DAC08E DAC08C Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit Power Supply Current I+ = 5 V, I REF = 1.0 mA 2.3 3.8 2.3 3.8 2.3 3.8 mA I −4.3 −5.8 −4.3 −5.8 −4.3 −5.8 mA I+ = +5 V, −15 V, 2.4 3.8 2.4 3.8 2.4 3.8 mA I REF = 2.0 mA −6.4 −7.8 −6 .4 −7.8 −6.4 −7.8 mA I+ = 15 V, 2.5 3.8 2.5 3.8 2.5 3.8 mA I REF =

2.0 mA −6.5 −7.8 −6 .5 −7.8 −6.5 −7.8 mA Power Dissipation 5 V, I REF = 1.0 mA +5 V, −15 V, 33 48 33 48 33 48 mW REF = 2.0 mA 15 V, I REF = 2.0 mA 108 136 103 136 108 136 mW 135 174 135 174 135 174 mW Guaranteed by design. TYPICAL ELECTRICAL CHARACTERISTICS = 15 V, and I REF = 2.0 mA, unless otherwise noted. Output characteristics apply to both I OUT and OUT . Table 2. Parameter Symbol Conditions All Grades Typical Unit Reference Input Slew Rate dI/dt 8 mA/s Propagation Delay PLH , t PHL = 25C, any bit 35 ns

Settling Time To 1/2 LSB, all bits switched on or off, T = 25C 85 ns
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DAC08 v. C | Pa ge 5 o 2 ABSOLUTE MAXIMUM RATINGS Table 3. Operating Temperature DAC08AQ, DAC 08Q −55C to +125C DAC08HQ, DAC 08EQ, DAC08CQ, DAC08HP, DAC 08EP 0C to +70C DAC08CP, DAC0 8CS −40C to +85C nction Temperature (T ) −65C to +150C Storage Temperature Q Package −65C to +150C Storage Temperature P Package −65C to +125C Lead Temperature (Soldering, 60 sec)

300C V+ Supply to V− Supply 36 V Logic Inputs V− to V− + 36 V LC V− to V+ Analog Current Outputs (at S = 15 V) 4.25 mA Reference Input (V 14 to V 15 ) V− to V+ Reference Input Differential Voltage (V 14 to V 15 Reference Input Current (I 14 Package Type JA JC Unit 16-Lead CERDIP (Q) 100 16 C/W 16-Lead PDIP (P ) 82 39 C/W 20-Terminal LCC (RC) 76 36 C/W 16-Lead SOIC (S ) 111 35 C/W JA is if ied r wo rs t-cas m unting co nd itio ns , that is , JA i speci f r devi ce soc ket for P, PD IP, d LCC pa cka es; JA i speci f r devi ce

so ld ere t pri d ci rcui boa d for SOIC pa cka e. es g r t os e li u der A M xi m s ma y c us e p an en t da ma t t e de ce . This is a st re ss r on and f nc on op of t d a a o condi on s ab e t e indi ca te d t e o er io l io n o t is sp if ic io n is no t im pl ie E sur t a te max m r ng co ndi on s fo ex tende d s ma a fe de vice rel ESD CAUTION ESD (electrostatic discharge) sensitive device. Ele tros tatic charg s as high as 4000 V readily accumulate on the human body and test eq uipment and can discharge wi thout detection. Although this product features proprietary ESD protection circu

try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. Theref ore, prop er ESD precautions a e recommended to avoid perform nce degradation or l ss of functiona ity.
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DAC08 v. C | Pa ge 6 o 2 PIN CONNECTIONS 16 15 14 13 12 11 10 LC V OUT (MSB) B1 B2 B3 B4 COMP REF ( REF (+) V+ B8 (LSB) B7 B6 B5 DAC08 TOP VIEW (Not To Scale) OUT 16 15 14 13 12 11 10 V+ REF (+) REF ( COMP LC V OUT B8 (LSB) B7 B6 B5 B4 B3 B2 B1 (MSB) DAC08 TOP VIEW (Not To Scale) OUT 18 17 16 15 14 20 19 10 11 12 13 REF (+) B3 LC NC RE (–) NC = NO CONNECT COMP V+ NC B7 OUT V

OUT NC (MSB) B1 B2 B4 NC B5 B6 (L SB DAC08 TOP VIEW (Not To Scale) gure 2. 16-L ad In-Li e P ckag e (Q and P Suf re 3. 16-L ad IC (S Suffi x) gur D C0 C/ 88 3 20 -L d L C (R C Suffi x)
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DAC08 v. C | Pa ge 7 o 2 TEST AND BURN-IN CIRCUITS 0V YPI VA ES: IN =5 +V IN 10V 14 15 16 OPTIONAL RESISTOR FOR OFFSET INPUTS REF +V REF IN 200 NO CAP EQ gure 5. P ls ed nc e er ati n 16 15 14 13 12 11 10 DAC08 C1 R1 C2 +18V C3 R1 = 9k C1 = 0.001 C2, C3 = 0.01 18V MIN 12 gure 6. Bu rn-In C t
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DAC08 v. C | Pa ge 8 o 2 TYPICAL PERF ORM ANCE CHA ACTE RISTICS 2.5V 0.5V 0.5mA OUT

–2.5mA 200ns/DIVISION EQ 200 = 100 = 0 1V 100mV 200ns gu F st ed Re fe e Op 0mA 1.0mA 2.0mA (0000|0000) (1111|1111) REF = 2mA OUT OUT re 8. T ue and Comp le me nt ar O ut O er at ion 50ns/DIVISION 100mV 2V 50ns 5mV 2.4V 0.4V 0V re 9. LSB Swit ing TLIN TIM FIX FS =2 =1 1/ 2L 50ns/DIVISION ALL BITS SWITCHED ON 10mV 50ns 1V 2.4V 0.4V 1/2LSB 0V +1/2LSB OUTPUT SETTLING re 10. F ll- al e S ling Ti me I REF , REFERENCE CURRENT (mA) I FS , OUTP UT CURRE NT (mA) 12 34 = T MIN TO T MAX ALL ITS HIGH LIMIT FOR V = 5V LIMIT FOR = 15V gure 11. F ll- al e Cur ent v . R fe nc e Cu rrent FS , OUTPUT FULL-SCALE

CURRENT (mA) OP AGATION DE LAY (ns 500 400 300 200 100 0.005 0.02 0.10 0.50 2.00 1LSB = 7.8 1LSB = 61nA 10.00 0.01 0.05 0.20 1.00 5.00 re 12. LSB Pr op ag at n v . I FS
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DAC08 v. C | Pa ge 9 o 2 FREQUENCY (MHz) RELATIVE OUTPUT (dB) 10 0.1 –14 0.2 0.5 1.0 2.0 10.0 –2 –4 –6 –8 –10 –12 5.0 R14 = R15 = 1k 500V ALL BITS ON R15 = 0V = 15pF, V IN = 2.0V p-p CENTERED AT +1.0V LARGE SIGNAL = 15pF, V IN = 50mV p-p CENTERED AT +200mV SMALL SIGNAL gure 13. R ference Input F equ nc y sponse 15 , REFERENCE COMMON-MODE VOLTAGE (V) OUTP UT CURRE T (mA) 4.0 –1 3.6 3.2 2.8 2.4 18 2.0 1.6 1.2 0.8

0.4 –10 = T MIN TO T MAX NOTE: POSITIVE COMMON-MODE RANGE IS ALWAYS (V+) –1.5V REF = 2mA V = 15V V = 5V V+ = +15V ALL BITS ON REF = 1mA REF = 0.2mA –2 10 14 gure 14. R ference A p Co mm on-M ode R nge LOGIC INPUT VOLTAGE (V) LOGIC INPUT ( A) 10 –12 481 gure 15. L gic Inp t Current v . Input V lt age TEMPERATURE (°C) TH –V LC (V 2.0 –5 1.6 1.2 0.8 0.4 100 150 re 16. TH LC vs . er ur VO (V) OUTP UT CURRE NT (mA) 4.0 –14 3.6 3.2 2.8 2.4 18 2.0 1.6 1.2 0.8 0.4 –1 = T MIN TO T MAX REF = 1mA REF = 0.2mA 10 14 = 15V V = 5V I REF = 2mA ALL BITS ON gure 17. O tput Current v . O tput V lt ag e (O ut put

V lt ag e Comp an ) TEMPERATURE (°C) TP V LT ( 28 24 20 16 12 –12 –4 –8 –50 50 100 150 SHADED AREA INDICATES PERMISSIBLE OUTPUT VOLTAGE RANGE FOR V = 15V. REF 2.0mA. FOR OTHER V– OR I REF SEE OUTPUT CURRENT VS. OUTPUT VOLTAGE CURVE. re 18. O ut V lt ag e Comp li ance v . T mper atur e
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DAC08 Rev. C | Page 10 of 20 LOGIC INPUT VOLTAGE (V) OUTP UT CURRE NT (mA) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 –1 –8 B4 B5 –4 B3 B1 V = 5V V = 15V B2 REF = 2.0mA NOTE: B1 THROUGH B8 HAVE IDENTICAL TRANSFER CHARACTERISTICS. BITS ARE FULLY SWITCHED WITH LESS THAN 1/2 LSB ERROR, AT LESS THAN 100mV

FROM ACTUAL THRESHOLD. THESE SWITCHING POINTS ARE GUARANTEED TO LIE BETWEEN 0.8V AND 2.0V OVER THE OPERATING TEMPERATURE RANGE (V LC = 0.0V). re 19. Bit T ans er Ch ar ac te ris V+, POSITIVE POWER SUPPLY (V dc) WE R S CURRE NT (mA) 10 12 14 16 18 I I+ ALL BITS HIGH OR LOW 01 re 20. wer S ly v . V V , NEGATIVE POWER SUPPLY (V dc) WE R S CURRE NT (mA) 10 0 –2 –4 –6 –8 –10 12 –14 16 –18 I+ BITS MAY BE HIGH OR LOW I– WITH I REF = 2mA I– WITH I REF = 1mA WITH I REF = 0.2mA gure 21. wer S ly Cu rrent v . V TEMPERATURE (°C) WE R S CURRE NT (mA) 10 –50 50 100 150 I I+ ALL BITS HIGH OR LOW REF = 2.0mA

V+ = +15V V = 15V gure 22. wer S ly Cu rrent v . T mper atur e
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DAC08 Rev. C | Page 11 of 20 BASIC CONNECTIONS +V REF REF IN IN IN 14 15 R15 (OPTIONAL) HIGH INPUT IMPEDANCE +V REF MUST BE ABOVE PEAK POSITIVE SWING OF V IN REF R15 REF PEAK NEGATIVE SWING OF I IN REF REF IN +V REF 14 15 14 15 re 23. Ac mm odat Bi po la r R nc es R15 REF FOR FIXED REFERENCE, TTL OPERATION, TYPICAL VALUES ARE: V REF = 10.000V R REF = 5.000k R15 = R REF C = 0.01 V LC = 0V (GROUND) MSB B1 B2 B3 B4 B5 B6 B7 LSB B8 V COMP 0.1 V V+ LC V+ REF (+) +V REF REF (R14) REF (–) 14 15 56 78 31 0.1 FR = + I = I

FR FOR LL LOGIC STATES +V REF REF 255 256 gure 24. Bas c sitive R fe nce O er at ion REF = 2.000mA MSB B1 B2 B3 B4 B5 B6 B7 LSB B8 5.000k 5.000k 14 FULL RANGE HALF SCALE +LSB HALF SCALE HALF SCALE LSB ZERO SCALE +LSB ZERO SCALE B1 B2 B3 B4 B5 B6 B7 B8 1.992 1.008 1.000 0.992 0.008 0.000 0.000 0.984 0.992 1.000 1.984 1.992 –9.960 –5.040 –5.000 –4.960 –0.040 0.000 0.000 4.920 4.960 5.000 9.920 9.960 gur Ba Uni ol ar Ne ga ti Ope n REF = 2.000mA MSB B1 B2 B3 B4 B5 B6 B7 LSB B8 10V 10k 10k 14 POS. FULL RANGE POS. FULL RANGE LSB ZERO SCALE +LSB ZERO SCALE ZERO SCALE –LSB NEG. FULL SCALE +LSB NEG.

FULL SCALE B1 B2 B3 B4 B5 B6 B7 B8 –9.920 –9.840 –0.080 0.000 +0.080 +9.920 +10.000 +10.000 +9.920 +0.160 +0.080 0.000 –9.840 –9.920 gure 26. Bas c B pol r O tput O er ation APPROX 5k 1V REF (+) 2mA 39k 10k POT LOW T.C. 4.5k REF 10V 14 15 gure 27. Rec mmended ll-S le Adjustment C rcuit REF R15 –V REF FS –V REF REF NOTE REF SETS I FS ; R15 IS FOR BIAS CURRENT CANCELLATION. 14 15 gure 28. Bas c Ne gative fe e er at ion
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DAC08 Rev. C | Page 12 of 20 *OR ADR01 10k +15V 15V –15V +15V 5.0k 15V MSB B1 B2 B3 B4 B5 B6 B7 LSB B8 5.000k 5.0k PO S. FULL RANGE ZERO SCALE NEG. FULL SCALE

+1LSB NEG. FULL SCALE B1 B2 B3 B4 B5 B6 B7 B8 +4.960 0.000 4.960 5.000 10V REF01* –V V+ LC AD8671 gure 29. O ffset Binar O ation 0 TO –I FR FR = I REF 255 256 AD8671 FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC) CONNECT INVERTING INPUT OF OP AMP TO I (PIN 2): CONNECT I (PIN 4) TO GROUND. gure 30. P sit ve L w Impedanc tput er ation 0 TO –I FR FR = I REF 255 256 AD8671 FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC) CONNECT NONINVERTING INPUT OF OP AMP TO I (PIN 2): CONNECT I (PIN 4) O GROUND. gure 31. Neg tive L w I ped nce O tput O er at ion TT L, L, TH =1 15V 9.1k

6.2k 0.1 LC 13k 39k ECL "A" 3k TO PIN 1 LC 6.2k 5.2V 20k 20k V+ "A" 3k TO PIN 1 LC R3 400 MO TEMPERATURE COMPENSATING V LC CIRCUITS TH = V LC 1.4V 15V CMOS TH = 7.6V LC 2N3904 2N3904 2N3904 2N3904 gure Int acing wi th V ri s L gi c F es
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DAC08 Rev. C | Page 13 of 20 APPLICATION INFORMATION REFERENCE AMPLIFIER SETUP The D C08 is a m ly in g D A co er r i ich t e o en t is t e p uc t o a dig l n er an d e in pu t fer e c en t. Th e r fer e c en t ma y b f xe d o ma y va f n ly zer t 4.0 mA. Th e f -s cal o c en t a l ne ar f nc on of t re fe re nc c a i g ve REF FR er e REF = I

14 p ve re re nc a ns an e te ve re re e fo es c en t t ug h R14 in t e V RE te (P in 14) o th e ref e am if ier Al a nega re re nc m a to V RE F(–) a Pi 1 re re nc c f om g oun t rou i to V REF(+) a i th po ti re re nc c ne ve re re nc c on h t ad van e o a ver hig i da e p es en d P n 15. Th e e a P n 1 is e ual a nd t acks t e v e a P n 15 e th ga in o th in rnal r a ie R15 (n nal y eq ual t R14) is us ed t can b as c en t er rs; R15 ma b el imi wi o ly a mi r i cr in er Bi la r r fer es ma b accommo da te d o fs et REF or n 15. Th e neg co mm on- e ra e o t e r fer e plif ier is g n b V CM

– = V pl us (I REF  1 kΩ) p us 2.5 V The p si ve comm on- e ran e is V+ les 1. 5 V Whe d re re nc i u re re nc ss tor i co mm nde A 5.0 V L lo c su ly is n r co mm nde d as a r fer e. a r gu la d r su ly is us as a r fer e, R14 sh ld be sp li t in tw o r sis s wi t e tion d t g wi th a 0.1 F ca ci Fo m ap at t t I REF a nd I FS im in es t e ne fo r t imming I REF If r f tr immin can acco lis ad in g t e val e o R14, or usin g a iom ter f r R14. An im o f ale min t e ina es p iom r T C. ef fe s is sho n i t e r co mm nde d f -s le a st me cir t (F igur e 27). l we v lu of

re re nc c re ne ve we su ly c t and i re fe re nc am pl if ie ne ve co mm on- r e. T e r commende d r e fo o er io n wi th a dc r e c en t is 0. 2 mA t 4.0 mA. REFERENCE AMPLIFIER COMPENSATION FOR MULTIPLYING APPLICATIONS re re nc a ns re qu t re re am to b te d u a tor f om Pi n 1 to V Th v lu of th c pa ci de pen o th im ped p en t P 1 r R14 val es o 1.0 kΩ, 2.5 k , a nd 5.0 kΩ, minim m val es of C a e 15 pF , 37 pF , a d 75 pF . L rg er val es o R14 r ir e prop or on ely i lu of C fo r p er phas e ma rg in, so th ra ti o o C (pF) t R14 (kΩ) = 15. r fas es t r t a p ls lo

w val es o R 14 ena lin smal l v es s ld be used I n is d en b a h im peda a a tra curr so ur ce n o th eced g es suf ce , a nd t e plif ier m st co en d, w ich de cr s o er l b ndwi and sle r te. F R14 = 1 k a = 15 pF , t e fer e a pl ier s s a 4 mA/s, enab li a tra si ti f REF = 0 t I REF = 2 mA in 500 n . era ion w ls e in pu ts t t e r fer e a plif ier ca n at a a at s T p id es lo ful -s tra si ti tim s. An in al cl am a qu re ve of t re re nc amp f om a cu ( REF = 0) co ndi tion. F -s cale tra tion (0 mA t 2 mA) rs in 120 ns w en t e eq uivalen im dance a P n 14 is 200 Ω a

d = 0. This yie ds a e s r o 16 mA/s ich is r vely in nden t e R IN an d IN val es. LOGIC INPUTS The D C08 des in co es a uniq log c in t cir ui t tha ena les dir in ace al l p la r log c fa milies and ide maxi m is e i ni ty . Thi fe ure is made le t e rg e in t s ing ca li ty , 2 log c in t en t, an d com lete ad le log c thr sh old v F r V− = −15 V the log c in ts ma y swin g betw n −10 V an d +18 V This enab les dir in ace wi 15 V CM OS log c, even en t e D C0 8 is p d f a 5 V . Minim m in t lo c swi g a nd mi ni m lo c t sh old vol e a e gi b V− + ( REF

 1 kΩ) + 2.5 V The log shold ma y b ad er a w de ra e b placi a e e a t e log c t sh old con l p n (P 1, LC Fi 1 ow t r ip V LC an d TH er t e er ur e ra w V TH n minal y 1.4 a e LC . T L and DTL i ter ac e, si ly g Pi n 1. W in rfa in g ECL, a I RE = 1 mA is r co mmende F r in ter ac ing r logic fa mi lies, see F gur 32. F r g ral set-u o t e log c co l cir ui t, te tha P n 1 s ur ces 100 A typ cal; te rc shou b de to t cu rr
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DAC08 Rev. C | Page 14 of 20 set li t a o ta in ed w en P 1 a l im dan e. Pin 1 is co te d to a 1 k divi der fo ex ple, sh ld b

ed g nd b a 0.01 F c ci ANALOG OU TPUT CURRENTS th tr ue an d c lemen ed ou sin c en ts a e p ide er e I + = I FS C ap at t t ( ) o en a 1 (log ic hig ) is a plie d t e ch log c in t. t e na co t in creas s, t e c en t a Pin 4 incr s op onal in t e fash io n of a p si log D C. en a 0 is a plie d y i t t, t c en t is o f a Pin 4 nd t o n 2. A decr easin log c co un t in cr eas s as in n ve o in ver ed log c D C. B th o s ma y be us sim an eo . one of t output i not re qu it st c te to ou nd or to a c bl of s ng I FS ; do n t le e an un us ed o n o en. out ut ha ve an e ely w de vol age

c anc f ct cu rr ta c th a re stor t to g ou nd or ot he vo lt age s P ve c ce is 36 V ab e V− an d is in dep nden o th e si ti su . ga com an ce is g n V− + ( REF  1 kΩ) + 2.5 V The d al o s ena le dou le th e usual -to-p lo ad swi g w dr ivi g lo ads in asi-d er en f shio This fe ur e is esp ci ly us ef in cab e dr ivi g, C T def and in o r b lan a pli io such as dr ivi g c er d co ils a d tran sfo rs. POWER SUPPLIES The D C08 o era es o er a wi de ra e o p wer s es f a tal s o 9 V t 36 V en o era in g lies o 5 V o lo I REF 1 mA is r co mm ended w fer e c en

t o er io n de cr s p c um pt io n and in cr eas s ga co an ce ( igur e 11 , r fer e a pl if ier ti commo -m e ra e (F igur e 14), nega ti log c in t ra e ( igure 15 , and neg ve l c re sh ol d r e ( igure 1 . Fo e o at at w I REF = 2 mA is t co mm nde d b us e n ve ut co ce w d b ce d t zer . O er ion f lo r sup lies is p ssib le; we a le ast 8 V t tal be ie d t ens t -o n o th e i rn al b as mm et cal sup lies a e n t r ir , as e D C08 is q e in e t var ion i su ly v B o era io n is beca use n gr co nn ecti i r ir ed h a ti cial gr ma y be used t e c swin e in be tw acc le limi ts . P wer co

um io n is calc as fol s: A us ef f ur e o th e C08 desig is tha su c en t is co an d ndep nden o in t lo c st es. This is us ef i ap ap at a f r s o t we su ly ss c tors TEMPERATURE PERFOR MANCE The a d ni ci ty sp if ic ion o t e C0 8 e gua to a pl y o er t en ra d op era in g era ra F -s cale o c en t dr if t is lo typ cal y 10 p / C, wi zer -s le o c t and dr if t e ia ig le com ed t 1/2 LS The t er ure co ef cien t o t e r fer e r sis R14 sh ma h an d t ack t o t e o r sist fo r mini m o era l -s cale dr if t. S lin s of th e D C08 de cr eas i- ma te 10% a –55C. A

+125C, a in cr eas of a t 15 % is typ l. The r fer e am plif ier m st co d usin g a ca ci r f P n 16 t V−. F f xed r e o era ion, a 0.01 F ca ci r is r co mm en ded F r va ab le e plic io , r fer t t e Refer e A plif ier C en on fo r ly in g A pplica ion s io n. MULTIPLYING OPERATION The D C08 p ide exce en t in g p ma e w ext eme y li ne r la shi tw I FS and REF ov a ra e o 4 A t 4 mA. M nic o era io n is ma in o a ty ca l ra e I REF f 100 A t 4.0 mA. SETTLING TIME The D C08 is c e o ext eme y fas s ling t s, typ cal y 85 n a I REF = 2.0 mA. J dicio cir

ui t des and ca l boa la m be u t ob ta in full pe rf po l test g and a pli io n. The lo c sw ch desig ena le s prop ag of on ly 3 ns f e ch of t 8 bit tt ng t wi 1 2 LS B o t e LSB is t er efo e 35 n , w e ch og y la rg er b t t succes si y lo er . The MS B les in 85 n , th us deter ining th e eral l s lin t o 85 n . S lin to 6-b t acc rac r ir es a t 65 n t 70 n . The o ca ci e o t e C08, i cl udin g t e p cka is ima y 15 pF; t er efo e t e o ut R t con domi te s tt ng t me R > 500 Ω. lin t and p ion d a e r vely in e to lo c in t am pli e and r and fa t d e to t e hig ga in o t e log

c swi ch es. S t als r ma in s ess y co tan f r I REF val es. Th e p ci l ad e o hig er I REF val es lies in t e a il y t a ta in a g n o lev wi lo r lo ad r sis s, th us r cin the o R t me co tan . as ur in g t e s t r quir es t e a y acc ra te e 4 A; t er efo e a 1 k lo ad is n to p ide ad eq ua te d e f r m oscillos co pes. Th e set lin tim f xt ur e sho n i F gur 33 us es a cas e desig to p dr in g a 1 kΩ lo ad wi les tha 5 pF o p rasi tic ca ci ta e a e ur en t no de. A I REF val es o les tha 1. 0 mA, exces e
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DAC08 Rev. C | Page 15 of 20 dam in g o

e ou is dif t p en w e main ini g ad te s ivi H t e m r ca 01111111 t 10000000 p ides a acc ra indic r o s lin . This co de cha do es r ir e t e al 6.2 t co ta s t s le t wi thi 0.2% o th f l a th us ling tim is obs ed a l wer val es o I REF . s itch t ans or tc he are ve l and c be f her r ced smal l ca ci ti lo ads a th e o a a mi r s cr if ice in s lin F st est o era n can b ob ta in usin g sh t le ads, minimizin o c ci tan e nd lo ad r sistor va es, a nd ade ua te ssin g a t e su ly re fe re nc e, and V LC t inals. S ies do n t r ir e la rg e e ol yt ic b c ci to rs b us e t e c en

t dra n is in dep en t o in t l c s es; 0.1 ca ci rs pp pi ns prov f t ans prot REF +15V OUT IN R15 REF 0.01 15V 1k MINIMUM CAPACITANCE +5V 0.1 RN- =2 URN- =0 1k 2k 100k 50 OUT 1 PROBE 15k –15V 0.1 14 15 13 10 11 12 31 0.1 0.1 DAC08 Q2 0V 0V +0.4V –0.4V Q1 CL 0.7V gure 3 ttli g T em ent
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DAC08 Rev. C | Page 16 of 20 ADI CURRENT OUTPUT DACS Table 4 lists the latest DACS available from Analog Devices. Table 4. Model Bits Outputs Interface Package Comments AD5425 8 1 SPI, 8-bit load MSOP-10 Fast 8-bit load; see also AD5426 AD5426 8 1 SPI MSOP-10 See also AD5425 fast load AD5450 8

1 SPI SOT23-8 See also AD5425 fast load AD5424 8 1 Parallel TSSOP-16 AD5429 8 2 SPI TSSOP-16 AD5428 8 2 Parallel TSSOP-20 AD5432 10 1 SPI MSOP-10 AD5451 10 1 SPI SOT23-8 AD5433 10 1 Parallel TSSOP-20 AD5439 10 2 SPI TSSOP-16 AD5440 10 2 Parallel TSSOP-24 AD5443 12 1 SPI MSOP-10 See also AD5452 and AD5444 AD5452 12 1 SPI SOT23-8 Higher accuracy version of AD5443; see also AD5444 AD5445 12 1 Parallel TSSOP-20 AD5444 12 1 SPI MSOP-10 Higher accuracy version of AD5443; see also AD5452 AD5449 12 2 SPI TSSOP-16 AD5415 12 2 SPI TSSOP-24 Uncommitted resistors AD5447 12 2 Parallel TSSOP-24 AD5405 12 2

Parallel LFCSP-40 Uncommitted resistors AD5453 14 1 SPI SOT23-8 AD5553 14 1 SPI MSOP-8 AD5556 14 1 Parallel TSSOP-28 AD5446 14 1 SPI MSOP-10 MSOP version of AD5453; compatible with AD5443, AD5432, AD5426 AD5555 14 2 SPI TSSOP-16 AD5557 14 2 Parallel TSSOP-38 AD5543 16 1 SPI MSOP-8 AD5546 16 1 Parallel TSSOP-28 AD5545 16 2 SPI TSSOP-16 AD5547 16 2 Parallel TSSOP-38
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DAC08 Rev. C | Page 17 of 20 OUTLINE DIMENSIONS 16 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.100 (2.54) BSC SEATING PLANE 0.015 (0.38) MIN 0.180 (4.57) MAX 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130

(3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.785 (19.94) 0.765 (19.43) 0.745 (18.92) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095AC gure 34. 16-L ead PDI (N-16) mensions sh in inc es and ( m) 16 18 0.310 (7.87) 0.220 (5.59) PIN 1 0.005 (0.13) MIN 0.098 (2.49) MAX 15° 0° 0.320 (8.13) 0.290 (7.37) 0.015

(0.38) 0.008 (0.20) SEATING PLANE 0.200 (5.08) MAX 0.840 (21.34) MAX 0.150 (3.81) MIN 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.100 (2.54) BSC 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN gure 35. 16-L ead CERDIP -16) mensions sh in inc es and ( m) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE

FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-012AC 16 4.00 (0.1575) 3.80 (0.1496) 10.00 (0.3937) 9.80 (0.3858) 1.27 (0.0500) BSC 6.20 (0.2441) 5.80 (0.2283) SEATING PLANE 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8° 0° 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) COPLANARITY 0.10 45 gure 36. 16-L ead SOIC (R -16A) mensions sh in inc es and ( m) 20 13 19 14 18 BOTTOM VIEW 0.028 (0.71) 0.022 (0.56) 45 TYP 0.015 (0.38) MIN 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) BSC 0.075 (1.91) REF 0.011 (0.28) 0.007 (0.18) R

TYP 0.095 (2.41) 0.075 (1.90) 0.100 (2.54) REF 0.200 (5.08) REF 0.150 (3.81) BSC 0.075 (1.91) REF 0.358 (9.09) 0.342 (8.69) SQ 0.358 (9.09) MAX SQ 0.100 (2.54) 0.064 (1.63) 0.088 (2.24) 0.054 (1.37) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN re 37. 2 nal L ad les Chip Carr ie r ( -2 0) mensions sh in inc es and ( m)
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DAC08 Rev. C | Page 18 of 20 ORDERING GUIDE Model NL Temperature Range Package Description Package Option No. Parts Per Container

DAC08AQ 0.10% 55C to +125C CERDIP-16 Q-16 25 DAC08AQ/883C 0.10% 55C to +125C CERDIP-16 Q-16 25 DAC08HP 0.10% 0C to 70C PDIP-16 N-16 25 DAC08HQ 0.10% 0C to 70C CERDIP-16 Q-16 25 DAC08Q 0.19% 55C to +125C CERDIP-16 Q-16 25 DAC08RC/883C 0.19% 55C to +125C LCC-20 E-20 55 DAC08EP 0.19% 0C to 70C PDIP-16 N-16 25 DAC08EQ 0.19% 0C to 70C CERDIP-16 Q-16 25 DAC08ES 0.19% 0C to 70C SOIC-16

R-16A (Narrow Body) 47 DAC08ES-REEL 0.19% 0C to 70C SOIC-16 R-16A (Narrow Body) 2500 DAC08ESZ 0.19% 0C to 70C SOIC-16 R-16A (Narrow Body) 47 DAC08ESZ-REEL 0.19% 0C to 70C SOIC-16 R-16A (Narrow Body) 2500 DAC08CP 0.39% 40C to +85C PDIP-16 N-16 25 DAC08CPZ 0.39% 40C to +85C PDIP-16 N-16 25 DAC08CS 0.39% 40C to +85C SOIC-16 R-16A (Narrow Body) 47 DAC08CS-REEL 0.39% 40C to +85C SOIC-16 R-16A (Narrow Body) 2500 DAC08CSZ 0.39%

40C to +85C SOIC-16 R-16A (Narrow Body) 47 DAC08CSZ-REEL 0.39% 40C to +85C SOIC-16 R-16A (Narrow Body) 2500 Devices processed in to tal compliance to MIL-STD-883. Consul t the factory for the 883 data sheet. For availability and burn-in information on the SOIC and PLCC packages, contact your local sales office. Z = Pb-free part.
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DAC08 Rev. C | Page 19 of 20 NOTES
Page 20
DAC08 Rev. C | Page 20 of 20 NOTES  2004 Analo De vices, Inc. All rights reserve . Tra em arks and registered tra ema ks are the prop erty of their

respective owners C00268–0 11/04(C)