PPT-DDM – A Cache Only Memory Architecture

Hagersten Landin and Haridi 1991 Presented by Patrick Eibl Outline Basics of CacheOnly Memory Architectures The Data Diffusion Machine DDM DDM Coherence Protocol Examples of Replacement Reading Writing. Avg Access Time 2 Tokens Number of Controllers Average Access Time clock cyles brPage 16br Number of Tokens vs Avg Access Time 9 Controllers Number of Tokens Average Access Time clock cycles brPage 17br brPage 18br Marc De Melo. Outline. Non-Uniform Cache Architecture (NUCA). Cache Coherence. Implementation of directories in multicore architecture. 2. Non-Uniform Cache Architecture [1]. Uniform Cache Architecture. for 3D memory systems. CAMEO. 12/15/2014 MICRO. Cambridge, UK. Chiachen Chou, Georgia Tech. Aamer. . Jaleel. , Intel. Moinuddin. K. . Qureshi. , Georgia Tech. Executive Summary. How to use . S. tacked DRAM: Cache or Memory. aka: DDMs. The Challenge: . The Essential Questions:. How can I show, in a reliable and valid way, my impact on students’ learning something important over the course of the year?. What data do I already collect, or do I need to collect, that will show my students’ growth that is fair to all groups of students?. CS448. 2. What is Cache Coherence?. Two processors can have two different values for the same memory location. Write Through Cache. 3. Terminology. Coherence. Defines what values can be returned by a read. Mark Gebhart. 1,2 . Stephen W. Keckler. 1,2. Brucek Khailany. 2. Ronny Krashinsky. 2. . William J. Dally. 2,3. 1. The University of Texas at Austin . 2. NVIDIA . 3. Stanford University. Methodology. AMANO, Hideharu, Keio University. hunga@am. ．. ics. ．. keio. ．. ac. ．. jp. Textbook. 　. pp.40-60. Cache memory. A small high speed memory for storing frequently accessed data/instructions.. (DRAM). Local secondary storage. (local disks). Larger, . slower, . and . cheaper . (per byte). storage. devices. Remote secondary storage. (distributed file systems, Web servers). Local disks hold files retrieved from disks on remote network servers.. and the Implications for Performance Optimization. Samuel Williams. 1,2. Jonathan Carter. 2. , Richard Vuduc. 3. , Leonid Oliker. 1,2. , John Shalf. 2. , . Katherine Yelick. 1,2. , James Demmel. 1,2. Managed jointly by CPU hardware and the operating system (OS). Programs share main memory. Each gets a private virtual address space holding its frequently used code and data. Protected from other programs. Lecture for CPSC 5155. Edward Bosworth, Ph.D.. Computer Science Department. Columbus State University. The Simple View of Memory. The simplest view of memory is . that presented . at the ISA (Instruction Set Architecture) level. At this level, memory is a . Zhijiong. Dennis . Huang. a. , . Junyu. Allen . Zheng. a. , . Yongtao. Hu. b. a. Institute. for Environmental and Climate Research, Jinan University. b. School. of Civil and Environmental Engineering, Georgia Institute of Technology. 1 Memory & Cache Memories: Review 2 Memory is required for storing Data Instructions Different memory types Dynamic RAM Static RAM Read-only memory (ROM) Characteristics Access time Price Volatility The basic objective of a computer system is to increase the speed of computation. Likewise, the basic objective of a memory system is to provide fast, uninterrupted access by the processor to the memory such that, the processor can operate at its expected speed. .