PPT-The Memory Hierarchy Cache, Main Memory, and Virtual Memory

Lecture for CPSC 5155 Edward Bosworth PhD Computer Science Department Columbus State University The Simple View of Memory The simplest view of memory is that presented at the ISA Instruction Set Architecture level At this level memory is a . Avg Access Time 2 Tokens Number of Controllers Average Access Time clock cyles brPage 16br Number of Tokens vs Avg Access Time 9 Controllers Number of Tokens Average Access Time clock cycles brPage 17br brPage 18br 15-213 / 18-213: Introduction to Computer Systems. 10. th. Lecture, Sep. . 27, 2012. Instructors:. . Dave O’Hallaron, Greg Ganger, and Greg . Kesden. Today. DRAM as building block for main memory. P & H Chapter 5.4-5. Performance. Virtual Memory Summary. PageTable. for each process:. 4MB contiguous in physical memory, or multi-level, …. every load/store translated to physical addresses. Hakim Weatherspoon. CS 3410, Spring 2011. Computer Science. Cornell University. P & H . Chapter. 5.4-5. Announcements. PA3 . available. Due . Tuesday, April 19. th. Work with . pairs. Be responsible with new knowledge. and Cache. A Mystery…. Memory. Main memory . = . RAM. : Random Access Memory. Read/write. Multiple . flavors . DDR SDRAM most common. 64 . bit wide. DDR : Dual Data Rate. S . : Synchronous. D : synamic. Hierarchy with Hi-Spade. . Phillip B. Gibbons. Intel Labs Pittsburgh. September 22, 2011. Abstract. The . goal of the Hi-Spade project is to enable a hierarchy-savvy approach to algorithm design and systems for emerging parallel hierarchies. Good performance often requires effective use of the cache/memory/storage hierarchy of the target computing platform. Two recent trends---pervasive multi-cores and pervasive flash-based SSDs---provide both new challenges and new opportunities for maximizing performance. The project seeks to create abstractions, tools and techniques that (. Managed jointly by CPU hardware and the operating system (OS). Programs share main memory. Each gets a private virtual address space holding its frequently used code and data. Protected from other programs. Storage technologies and trends. Locality of reference. Caching in the memory hierarchy. CS 105. Tour of the Black Holes of Computing. Random-Access Memory (RAM). Key features. RAM. is traditionally packaged as a chip.. 11. th. Lecture, October 2, 2018. Today. Storage technologies and trends. Locality of reference. Caching in the memory hierarchy. Random-Access Memory (RAM). Key features. RAM . is traditionally packaged as a chip.. Prof. . Mikko. H. . Lipasti. University of Wisconsin-Madison. Lecture notes based on notes by . Jim Smith and Mark Hill. Updated by Mikko Lipasti. Readings. Read on your own:. Review: Shen & Lipasti Chapter 3. Virtual Memory Use main memory as a “cache” for secondary (disk) storage Managed jointly by CPU hardware and the operating system (OS) Programs share main memory Each gets a private virtual address space holding its frequently used code and data Virtual Memory 2 Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University P & H Chapter 5.4 Goals for Today Virtual Memory Address Translation Pages, page tables, and memory mgmt The basic objective of a computer system is to increase the speed of computation. Likewise, the basic objective of a memory system is to provide fast, uninterrupted access by the processor to the memory such that, the processor can operate at its expected speed. . Master the concepts of hierarchical memory organization.. Understand how each level of memory contributes to system performance, and how the performance is measured.. Master the concepts behind cache memory, virtual memory, memory segmentation, paging and address translation..